Attribute Registers by Name
| Attribute Name
| EEPROM Addr
| Module
| Register Addr
| Write Method
| Read Method
| Units/ Type
| Comment
|
| abort | -1 | SFTW | 0x0000 | RMSKW | RMSKW | Boolean | Control register for various bits^ADD^mcbControl^1^0^0^1
|
| AcqPxlCount | -1 | PIX | 0x0106 | NONE | SMPL | Value | Number of pixels acquired from the detector^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ActiveChannels | -1 | CCD# | 0x1001 | NONE | SMPL | Integer | Number of active channels for acquisition^MOD^ ^1.0^0.0^0.0^31.0
|
| actualIntegrationTime | -1 | CFG | 0x0101 | NONE | SMPL | Sec | Reads the actual integration time of an exposure^MOD^ ^1000.0^0.0^0.0^4294967.0
|
| actualIntTime | -1 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Set by DHE - The Actual integration time of exposure. Resolution is 1 millisecond^SUB^actualIntegrationTime^1000.0^0.0^0.0^4294967.295
|
| Afe1AdcPsVoltTel[] | 32 | CCD1 | 0x8030 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcPsVoltTel[0] | 36 | CCD1 | 0x8030 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcPsVoltTel[1] | 40 | CCD1 | 0x8031 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcPsVoltTel[2] | 44 | CCD1 | 0x8032 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcPsVoltTel[3] | 48 | CCD1 | 0x8033 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcRefVoltTel[] | 52 | CCD1 | 0x802c | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcRefVoltTel[0] | 56 | CCD1 | 0x802c | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcRefVoltTel[1] | 60 | CCD1 | 0x802d | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcRefVoltTel[2] | 64 | CCD1 | 0x802e | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcRefVoltTel[3] | 68 | CCD1 | 0x802f | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[] | 72 | CCD1 | 0x8080 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[0] | 76 | CCD1 | 0x8080 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[1] | 80 | CCD1 | 0x8081 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[10] | 116 | CCD1 | 0x808a | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[11] | 120 | CCD1 | 0x808b | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[12] | 124 | CCD1 | 0x808c | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[13] | 128 | CCD1 | 0x808d | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[14] | 132 | CCD1 | 0x808e | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[15] | 136 | CCD1 | 0x808f | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[2] | 84 | CCD1 | 0x8082 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[3] | 88 | CCD1 | 0x8083 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[4] | 92 | CCD1 | 0x8084 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[5] | 96 | CCD1 | 0x8085 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[6] | 100 | CCD1 | 0x8086 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[7] | 104 | CCD1 | 0x8087 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[8] | 108 | CCD1 | 0x8088 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[9] | 112 | CCD1 | 0x8089 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1ClkHiVal[] | 140 | CCD1 | 0x4030 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[0] | 144 | CCD1 | 0x4030 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[1] | 148 | CCD1 | 0x4031 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[10] | 184 | CCD1 | 0x403a | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[11] | 188 | CCD1 | 0x403b | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[12] | 192 | CCD1 | 0x403c | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[13] | 196 | CCD1 | 0x403d | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[14] | 200 | CCD1 | 0x403e | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[15] | 204 | CCD1 | 0x403f | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[2] | 152 | CCD1 | 0x4032 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[3] | 156 | CCD1 | 0x4033 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[4] | 160 | CCD1 | 0x4034 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[5] | 164 | CCD1 | 0x4035 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[6] | 168 | CCD1 | 0x4036 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[7] | 172 | CCD1 | 0x4037 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[8] | 176 | CCD1 | 0x4038 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[9] | 180 | CCD1 | 0x4039 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[] | 208 | CCD1 | 0x4020 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[0] | 212 | CCD1 | 0x4020 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[1] | 216 | CCD1 | 0x4021 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[10] | 252 | CCD1 | 0x402a | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[11] | 256 | CCD1 | 0x402b | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[12] | 260 | CCD1 | 0x402c | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[13] | 264 | CCD1 | 0x402d | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[14] | 268 | CCD1 | 0x402e | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[15] | 272 | CCD1 | 0x402f | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[2] | 220 | CCD1 | 0x4022 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[3] | 224 | CCD1 | 0x4023 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[4] | 228 | CCD1 | 0x4024 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[5] | 232 | CCD1 | 0x4025 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[6] | 236 | CCD1 | 0x4026 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[7] | 240 | CCD1 | 0x4027 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[8] | 244 | CCD1 | 0x4028 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[9] | 248 | CCD1 | 0x4029 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkVoltTel[] | 276 | CCD1 | 0x8010 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[0] | 280 | CCD1 | 0x8010 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[1] | 284 | CCD1 | 0x8011 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[10] | 320 | CCD1 | 0x801a | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[11] | 324 | CCD1 | 0x801b | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[12] | 328 | CCD1 | 0x801c | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[13] | 332 | CCD1 | 0x801d | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[14] | 336 | CCD1 | 0x801e | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[15] | 340 | CCD1 | 0x801f | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[2] | 288 | CCD1 | 0x8012 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[3] | 292 | CCD1 | 0x8013 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[4] | 296 | CCD1 | 0x8014 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[5] | 300 | CCD1 | 0x8015 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[6] | 304 | CCD1 | 0x8016 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[7] | 308 | CCD1 | 0x8017 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[8] | 312 | CCD1 | 0x8018 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[9] | 316 | CCD1 | 0x8019 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1HVBiasVal[] | 344 | CCD1 | 0x4008 | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[0] | 348 | CCD1 | 0x4008 | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[1] | 352 | CCD1 | 0x4009 | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[2] | 356 | CCD1 | 0x400a | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[3] | 360 | CCD1 | 0x400b | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[4] | 364 | CCD1 | 0x400c | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[5] | 368 | CCD1 | 0x400d | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[6] | 372 | CCD1 | 0x400e | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[7] | 376 | CCD1 | 0x400f | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HvBiasVoltTel[] | 380 | CCD1 | 0x8008 | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[0] | 384 | CCD1 | 0x8008 | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[1] | 388 | CCD1 | 0x8009 | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[2] | 392 | CCD1 | 0x800a | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[3] | 396 | CCD1 | 0x800b | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[4] | 400 | CCD1 | 0x800c | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[5] | 404 | CCD1 | 0x800d | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[6] | 408 | CCD1 | 0x800e | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[7] | 412 | CCD1 | 0x800f | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1LVBiasVal[] | 416 | CCD1 | 0x4000 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[0] | 420 | CCD1 | 0x4000 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[1] | 424 | CCD1 | 0x4001 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[2] | 428 | CCD1 | 0x4002 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[3] | 432 | CCD1 | 0x4003 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[4] | 436 | CCD1 | 0x4004 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[5] | 440 | CCD1 | 0x4005 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[6] | 444 | CCD1 | 0x4006 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[7] | 448 | CCD1 | 0x4007 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LvBiasVoltTel[] | 452 | CCD1 | 0x8000 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[0] | 456 | CCD1 | 0x8000 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[1] | 460 | CCD1 | 0x8001 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[2] | 464 | CCD1 | 0x8002 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[3] | 468 | CCD1 | 0x8003 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[4] | 472 | CCD1 | 0x8004 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[5] | 476 | CCD1 | 0x8005 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[6] | 480 | CCD1 | 0x8006 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[7] | 484 | CCD1 | 0x8007 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1RefVoltTel[] | 488 | CCD1 | 0x8020 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1RefVoltTel[0] | 492 | CCD1 | 0x8020 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1RefVoltTel[1] | 496 | CCD1 | 0x8021 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1RefVoltTel[2] | 500 | CCD1 | 0x8022 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1RefVoltTel[3] | 504 | CCD1 | 0x8023 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1RefVoltTel[4] | 508 | CCD1 | 0x8024 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1RefVoltTel[5] | 512 | CCD1 | 0x8025 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1SerialNum | -1 | CFG | 0x0053 | NONE | SMPL | SerNum | AFE1 Silicon Serial Number^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| Afe1Temperature1 | 32 | CFG | 0x0046 | NONE | SMPL | Deg C | AFE1 Temperature reading from sensor 1^MOD^ ^16.0^0.0^-127.0^127.0
|
| Afe1Temperature2 | 36 | CFG | 0x0047 | NONE | SMPL | Deg C | AFE1 Temperature reading from sensor 2^MOD^ ^16.0^0.0^-127.0^127.0
|
| Afe1TpClk1 | -1 | CCD1 | 0x7000 | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP1 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1TpClk2 | -1 | CCD1 | 0x7001 | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP2 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1TpClk3 | -1 | CCD1 | 0x7002 | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP3 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1TpClk4 | -1 | CCD1 | 0x7003 | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP4 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1TpHvbias1 | -1 | CCD1 | 0x7006 | SMPL | SMPL | Integer | Sets the HV biases mapped to HV_BIAS_TP1 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1TpHvbias2 | -1 | CCD1 | 0x7007 | SMPL | SMPL | Integer | Sets the HV biases mapped to HV_BIAS_TP2 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1TpLvbias1 | -1 | CCD1 | 0x7004 | SMPL | SMPL | Integer | Sets the LV biases mapped to LV_BIAS_TP1 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1TpLvbias2 | -1 | CCD1 | 0x7005 | SMPL | SMPL | Integer | Sets the LV biases mapped to LV_BIAS_TP2 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1Vcb+Amps | 32 | PSM | 0x0013 | NONE | SMPL | Milliamps | Current monitor value for +18V AFE1^MOD^ ^1.96^0.0^0.0^65535.0
|
| Afe1Vcb-Amps | 36 | PSM | 0x0016 | NONE | SMPL | Milliamps | Current monitor value for -18V AFE1^MOD^ ^1.96^0.0^0.0^65535.0
|
| Afe1Vhv+Amps | 40 | PSM | 0x0019 | NONE | SMPL | Milliamps | Current monitor value for +30V AFE1^MOD^ ^4.12^0.0^0.0^65535.0
|
| Afe1Vhv-Amps | 44 | PSM | 0x001c | NONE | SMPL | Milliamps | Current monitor value for -30V AFE1^MOD^ ^4.12^0.0^0.0^65535.0
|
| Afe1VidOffVal[] | 516 | CCD1 | 0x4010 | SMPL | SMPL | Integer | Video offset registers on AFE 1^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe1VidOffVal[0] | 520 | CCD1 | 0x4010 | SMPL | SMPL | Integer | Video offset registers on AFE 1^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe1VidOffVal[1] | 524 | CCD1 | 0x4011 | SMPL | SMPL | Integer | Video offset registers on AFE 1^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe1VidOffVal[2] | 528 | CCD1 | 0x4012 | SMPL | SMPL | Integer | Video offset registers on AFE 1^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe1VidOffVal[3] | 532 | CCD1 | 0x4013 | SMPL | SMPL | Integer | Video offset registers on AFE 1^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe1Vn50VoltTel | 536 | CCD1 | 0x802a | NONE | SMPL | Volts | Telemetry for Vn50 voltage on AFE 1^MOD^ ^409.6^2048.0^-5.0^5.0
|
| Afe1Vp33VoltTel | 540 | CCD1 | 0x8026 | NONE | SMPL | Volts | Telemetry for Vp3.3 voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1Vp50VoltTel | 544 | CCD1 | 0x8027 | NONE | SMPL | Volts | Telemetry for Vp5.0 voltage on AFE 1^MOD^ ^409.6^0.0^0.0^10.0
|
| Afe1Vp55VoltTel | 548 | CCD1 | 0x8028 | NONE | SMPL | Volts | Telemetry for Vp5.5 voltage on AFE 1^MOD^ ^409.6^0.0^0.0^10.0
|
| Afe1VpIfcVoltTel | 552 | CCD1 | 0x8029 | NONE | SMPL | Volts | Telemetry for VpIfc voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcPsVoltTel[] | 2080 | CCD2 | 0x8070 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcPsVoltTel[0] | 2084 | CCD2 | 0x8070 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcPsVoltTel[1] | 2088 | CCD2 | 0x8071 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcPsVoltTel[2] | 2092 | CCD2 | 0x8072 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcPsVoltTel[3] | 2096 | CCD2 | 0x8073 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcRefVoltTel[] | 2100 | CCD2 | 0x806c | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcRefVoltTel[0] | 2104 | CCD2 | 0x806c | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcRefVoltTel[1] | 2108 | CCD2 | 0x806d | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcRefVoltTel[2] | 2112 | CCD2 | 0x806e | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcRefVoltTel[3] | 2116 | CCD2 | 0x806f | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[] | 2120 | CCD2 | 0x8090 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[0] | 2124 | CCD2 | 0x8090 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[1] | 2128 | CCD2 | 0x8091 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[10] | 2164 | CCD2 | 0x809a | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[11] | 2168 | CCD2 | 0x809b | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[12] | 2172 | CCD2 | 0x809c | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[13] | 2176 | CCD2 | 0x809d | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[14] | 2180 | CCD2 | 0x809e | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[15] | 2184 | CCD2 | 0x809f | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[2] | 2132 | CCD2 | 0x8092 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[3] | 2136 | CCD2 | 0x8093 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[4] | 2140 | CCD2 | 0x8094 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[5] | 2144 | CCD2 | 0x8095 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[6] | 2148 | CCD2 | 0x8096 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[7] | 2152 | CCD2 | 0x8097 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[8] | 2156 | CCD2 | 0x8098 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[9] | 2160 | CCD2 | 0x8099 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2ClkHiVal[] | 2188 | CCD2 | 0x4070 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[0] | 2192 | CCD2 | 0x4070 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[1] | 2196 | CCD2 | 0x4071 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[10] | 2232 | CCD2 | 0x407a | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[11] | 2236 | CCD2 | 0x407b | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[12] | 2240 | CCD2 | 0x407c | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[13] | 2244 | CCD2 | 0x407d | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[14] | 2248 | CCD2 | 0x407e | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[15] | 2252 | CCD2 | 0x407f | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[2] | 2200 | CCD2 | 0x4072 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[3] | 2204 | CCD2 | 0x4073 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[4] | 2208 | CCD2 | 0x4074 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[5] | 2212 | CCD2 | 0x4075 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[6] | 2216 | CCD2 | 0x4076 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[7] | 2220 | CCD2 | 0x4077 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[8] | 2224 | CCD2 | 0x4078 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[9] | 2228 | CCD2 | 0x4079 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[] | 2256 | CCD2 | 0x4060 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[0] | 2260 | CCD2 | 0x4060 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[1] | 2264 | CCD2 | 0x4061 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[10] | 2300 | CCD2 | 0x406a | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[11] | 2304 | CCD2 | 0x406b | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[12] | 2308 | CCD2 | 0x406c | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[13] | 2312 | CCD2 | 0x406d | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[14] | 2316 | CCD2 | 0x406e | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[15] | 2320 | CCD2 | 0x406f | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[2] | 2268 | CCD2 | 0x4062 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[3] | 2272 | CCD2 | 0x4063 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[4] | 2276 | CCD2 | 0x4064 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[5] | 2280 | CCD2 | 0x4065 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[6] | 2284 | CCD2 | 0x4066 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[7] | 2288 | CCD2 | 0x4067 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[8] | 2292 | CCD2 | 0x4068 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[9] | 2296 | CCD2 | 0x4069 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkVoltTel[] | 2324 | CCD2 | 0x8050 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[0] | 2328 | CCD2 | 0x8050 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[1] | 2332 | CCD2 | 0x8051 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[10] | 2368 | CCD2 | 0x805a | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[11] | 2372 | CCD2 | 0x805b | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[12] | 2376 | CCD2 | 0x805c | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[13] | 2380 | CCD2 | 0x805d | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[14] | 2384 | CCD2 | 0x805e | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[15] | 2388 | CCD2 | 0x805f | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[2] | 2336 | CCD2 | 0x8052 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[3] | 2340 | CCD2 | 0x8053 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[4] | 2344 | CCD2 | 0x8054 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[5] | 2348 | CCD2 | 0x8055 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[6] | 2352 | CCD2 | 0x8056 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[7] | 2356 | CCD2 | 0x8057 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[8] | 2360 | CCD2 | 0x8058 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[9] | 2364 | CCD2 | 0x8059 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2HVBiasVal[] | 2392 | CCD2 | 0x4048 | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[0] | 2396 | CCD2 | 0x4048 | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[1] | 2400 | CCD2 | 0x4049 | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[2] | 2404 | CCD2 | 0x404a | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[3] | 2408 | CCD2 | 0x404b | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[4] | 2412 | CCD2 | 0x404c | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[5] | 2416 | CCD2 | 0x404d | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[6] | 2420 | CCD2 | 0x404e | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[7] | 2424 | CCD2 | 0x404f | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HvBiasVoltTel[] | 2428 | CCD2 | 0x8048 | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[0] | 2432 | CCD2 | 0x8048 | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[1] | 2436 | CCD2 | 0x8049 | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[2] | 2440 | CCD2 | 0x804a | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[3] | 2444 | CCD2 | 0x804b | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[4] | 2448 | CCD2 | 0x804c | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[5] | 2452 | CCD2 | 0x804d | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[6] | 2456 | CCD2 | 0x804e | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[7] | 2460 | CCD2 | 0x804f | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2LVBiasVal[] | 2464 | CCD2 | 0x4040 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[0] | 2468 | CCD2 | 0x4040 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[1] | 2472 | CCD2 | 0x4041 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[2] | 2476 | CCD2 | 0x4042 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[3] | 2480 | CCD2 | 0x4043 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[4] | 2484 | CCD2 | 0x4044 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[5] | 2488 | CCD2 | 0x4045 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[6] | 2492 | CCD2 | 0x4046 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[7] | 2496 | CCD2 | 0x4047 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LvBiasVoltTel[] | 2500 | CCD2 | 0x8040 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[0] | 2504 | CCD2 | 0x8040 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[1] | 2508 | CCD2 | 0x8041 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[2] | 2512 | CCD2 | 0x8042 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[3] | 2516 | CCD2 | 0x8043 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[4] | 2520 | CCD2 | 0x8044 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[5] | 2524 | CCD2 | 0x8045 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[6] | 2528 | CCD2 | 0x8046 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[7] | 2532 | CCD2 | 0x8047 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2RefVoltTel[] | 2536 | CCD2 | 0x8060 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2RefVoltTel[0] | 2540 | CCD2 | 0x8060 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2RefVoltTel[1] | 2544 | CCD2 | 0x8061 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2RefVoltTel[2] | 2548 | CCD2 | 0x8062 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2RefVoltTel[3] | 2552 | CCD2 | 0x8063 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2RefVoltTel[4] | 2556 | CCD2 | 0x8064 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2RefVoltTel[5] | 2560 | CCD2 | 0x8065 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2SerialNum | -1 | CFG | 0x0054 | NONE | SMPL | SerNum | AFE2 Silicon Serial Number ^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| Afe2Temperature1 | 40 | CFG | 0x0048 | NONE | SMPL | Deg C | AFE2 Temperature reading from sensor 1^MOD^ ^16.0^0.0^-127.0^127.0
|
| Afe2Temperature2 | 44 | CFG | 0x0049 | NONE | SMPL | Deg C | AFE2 Temperature reading from sensor 2^MOD^ ^16.0^0.0^-127.0^127.0
|
| Afe2TpClk1 | -1 | CCD2 | 0x7008 | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP1 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2TpClk2 | -1 | CCD2 | 0x7009 | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP2 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2TpClk3 | -1 | CCD2 | 0x700a | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP3 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2TpClk4 | -1 | CCD2 | 0x700b | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP4 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2TpHvbias1 | -1 | CCD2 | 0x700e | SMPL | SMPL | Integer | Sets the HV biases mapped to HV_BIAS_TP1 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2TpHvbias2 | -1 | CCD2 | 0x700f | SMPL | SMPL | Integer | Sets the HV biases mapped to HV_BIAS_TP2 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2TpLvbias1 | -1 | CCD2 | 0x700c | SMPL | SMPL | Integer | Sets the LV biases mapped to LV_BIAS_TP1 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2TpLvbias2 | -1 | CCD2 | 0x700d | SMPL | SMPL | Integer | Sets the LV biases mapped to LV_BIAS_TP2 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2Vcb+Amps | 48 | PSM | 0x0014 | NONE | SMPL | Milliamps | Current monitor value for +18V AFE2^MOD^ ^1.96^0.0^0.0^65535.0
|
| Afe2Vcb-Amps | 52 | PSM | 0x0017 | NONE | SMPL | Milliamps | Current monitor value for -18V AFE2^MOD^ ^1.96^0.0^0.0^65535.0
|
| Afe2Vhv+Amps | 56 | PSM | 0x001a | NONE | SMPL | Milliamps | Current monitor value for +30V AFE2^MOD^ ^4.12^0.0^0.0^65535.0
|
| Afe2Vhv-Amps | 60 | PSM | 0x001d | NONE | SMPL | Milliamps | Current monitor value for -30V AFE2^MOD^ ^4.12^0.0^0.0^65535.0
|
| Afe2VidOffVal[] | 2564 | CCD2 | 0x4050 | SMPL | SMPL | Integer | Video offset registers on AFE 2^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe2VidOffVal[0] | 2568 | CCD2 | 0x4050 | SMPL | SMPL | Integer | Video offset registers on AFE 2^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe2VidOffVal[1] | 2572 | CCD2 | 0x4051 | SMPL | SMPL | Integer | Video offset registers on AFE 2^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe2VidOffVal[2] | 2576 | CCD2 | 0x4052 | SMPL | SMPL | Integer | Video offset registers on AFE 2^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe2VidOffVal[3] | 2580 | CCD2 | 0x4053 | SMPL | SMPL | Integer | Video offset registers on AFE 2^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe2Vn50VoltTel | 2584 | CCD2 | 0x806a | NONE | SMPL | Volts | Telemetry for Vn50 voltage on AFE 2^MOD^ ^409.6^2048.0^-5.0^5.0
|
| Afe2Vp33VoltTel | 2588 | CCD2 | 0x8066 | NONE | SMPL | Volts | Telemetry for Vp3.3 voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2Vp50VoltTel | 2592 | CCD2 | 0x8067 | NONE | SMPL | Volts | Telemetry for Vp5.0 voltage on AFE 2^MOD^ ^409.6^0.0^0.0^10.0
|
| Afe2Vp55VoltTel | 2596 | CCD2 | 0x8068 | NONE | SMPL | Volts | Telemetry for Vp5.5 voltage on AFE 2^MOD^ ^409.6^0.0^0.0^10.0
|
| Afe2VpIfcVoltTel | 2600 | CCD2 | 0x8069 | NONE | SMPL | Volts | Telemetry for VpIfc voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| AfeClkStateReg | -1 | CCD# | 0x3002 | SMPL | SMPL | Integer | Sets the clock state to the hardware^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| AfeCodeId | -1 | CCD# | 0xffff | NONE | SMPL | Version | Firmware module revision code as MM.mm^MOD^ ^100.0^0.0^0.0^65535.0
|
| AfeInterfaceEnbl | -1 | CCD# | 0xf000 | SMPL | SMPL | Boolean | Enables electrical interface to AFE boards.^MOD^ ^1.0^0.0^0.0^3.0
|
| AfeModInStatus | -1 | CCD# | 0xfffd | NONE | SMPL | Boolean | Status of System as received from system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| AfeModOutStatus | -1 | CCD# | 0xfffc | NONE | SMPL | Boolean | Status of AFE Control module as transmitted to system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| AfeModuleId | -1 | CCD# | 0xfffe | NONE | SMPL | Ident | Firmware module identification code as an integer^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| AfeResetCmd | -1 | CCD# | 0xfffe | SMPL | NONE | ResetCmd | Causes module reset^MOD^ ^1.0^0.0^0.0^0.0
|
| arrayID[] | 412 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[0] | 413 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[1] | 414 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[2] | 415 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[3] | 416 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[4] | 417 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[5] | 418 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[6] | 419 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[7] | 420 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| ArrayType | 385 | SFTW | 0x0000 | SMPL | SMPL | IdNum | The Array type identifier index
|
| arrFdir | -1 | SFTW | 0x0000 | STRGS | STRGS | Directory | The directory for the array setup file (...Arr.mod.)
|
| arrFname | -1 | SFTW | 0x0000 | STRGS | STRGS | Filename | The file that describes default array related setup
|
| asyncVector | 386 | SFTW | 0x0000 | SMPL | SMPL | Bit_Field | The 30 bit value to write down for an asyncronous response^MOD^ ^1.0^0.0^0^0x3FFFFFFF
|
| avCommentSize | 387 | SFTW | 0x0000 | SMPL | SMPL | count | The number of characters in the AV pair array Comment column^MOD^ ^1.0^0.0^0^0xFF
|
| avNameSIze | 388 | SFTW | 0x0000 | SMPL | SMPL | count | The number of characters in the AV pair array Name column^MOD^ ^1.0^0.0^0^0xFF
|
| avValueSize | 389 | SFTW | 0x0000 | SMPL | SMPL | count | The number of characters in the AV pair array Value colum^MOD^ ^1.0^0.0^0^0xFF
|
| BiasEnbl | -1 | CCD# | 0xf005 | SMPL | SMPL | Enables | Enables the separate bias bank outputs (4 per AFE).^MOD^ ^1.0^0.0^0.0^255.0
|
| BlkReadFromBuffr | -1 | PIX | 0x001b | SMPL | SMPL | Boolean | Trigger a read a block of memory from the Image Buffer^MOD^ ^1.0^0.0^0.0^1.0
|
| BlkWrtToBuffr | -1 | PIX | 0x0014 | SMPL | SMPL | Boolean | Trigger a block write to the Image Buffer memory^MOD^ ^1.0^0.0^0.0^1.0
|
| BufBaseAddr[] | -1 | CCD# | 0x1020 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[0] | -1 | CCD# | 0x1020 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[1] | -1 | CCD# | 0x1021 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[2] | -1 | CCD# | 0x1022 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[3] | -1 | CCD# | 0x1023 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[4] | -1 | CCD# | 0x1024 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[5] | -1 | CCD# | 0x1025 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[6] | -1 | CCD# | 0x1026 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[7] | -1 | CCD# | 0x1027 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| captureMode | 390 | SFTW | 0x0000 | SMPL | SMPL | Mode | Software mode to use when capturing data^MOD^ ^1.0^0.0^0^0xFFFF
|
| ccdSeqPatMem | -1 | CCD# | 0x2040 | SMPL | SMPL | Integer | Marks the beginning of 64 locations for sequence state data in the cds micro-sequencer^MOD^ ^1.0^0.0^0.0^65535.0
|
| CcdSeqTrig | -1 | CCD# | 0x2003 | SMPL | SMPL | Integer | Triggers the cds micro-sequencer^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| CdsChanSlctReg | -1 | CCD# | 0x2001 | SMPL | SMPL | Integer | Bit mask reg to enable CDS writes to individual channels^MOD^ ^1.0^0.0^0.0^255.0
|
| CdsPortConfigReg | -1 | CCD# | 0x2000 | SMPL | SMPL | Integer | Sets CDS port mode; 0-Ports independent; 1- AFE2 is copy of AFE1; 2 - 1 copy of 1; 3 - not valid.^MOD^ ^1.0^0.0^0.0^2.0
|
| CdsStateReg | -1 | CCD# | 0x2002 | SMPL | SMPL | Integer | Sets the CDS hardware state^MOD^ ^1.0^0.0^0.0^255.0
|
| CfgCodeId | -1 | CFG | 0xffff | NONE | SMPL | Version | Firmware module revision code as MM.mm^MOD^ ^100.0^0.0^0.0^65535.0
|
| CfgModInStatus | -1 | CFG | 0xfffd | NONE | SMPL | Boolean | Status of System as received from system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| CfgModOutStatus | -1 | CFG | 0xfffc | NONE | SMPL | Boolean | Status of CFG Control module as transmitted to system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| CfgModuleId | -1 | CFG | 0xfffe | NONE | SMPL | Ident | Firmware module identification code as an integer^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| CfgResetCmd | -1 | CFG | 0xfffe | SMPL | NONE | ResetCmnd | Triggers an CFG module reset^MOD^ ^1.0^0.0^0.0^0.0
|
| ChanSrcSlct[] | -1 | CCD# | 0x1010 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[0] | -1 | CCD# | 0x1010 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[1] | -1 | CCD# | 0x1011 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[2] | -1 | CCD# | 0x1012 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[3] | -1 | CCD# | 0x1013 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[4] | -1 | CCD# | 0x1014 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[5] | -1 | CCD# | 0x1015 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[6] | -1 | CCD# | 0x1016 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[7] | -1 | CCD# | 0x1017 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ClearStats | -1 | PIX | 0x0108 | SMPL | NONE | Value | Clear the pixel statistics counters^MOD^ ^1.0^0.0^0.0^1.0
|
| ClkCfgRegs[] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[0] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[1] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[10] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[11] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[12] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[13] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[14] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[15] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[2] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[3] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[4] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[5] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[6] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[7] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[8] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[9] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCodeId | -1 | CLK | 0xffff | NONE | SMPL | Version | Firmware revision code as MM.mm^MOD^ ^100.0^0.0^0.0^65535.0
|
| ClkEnbl | -1 | CCD# | 0xf008 | SMPL | SMPL | Enables | Enables the separate clock bank outputs (4 per AFE)^MOD^ ^1.0^0.0^0.0^255.0
|
| ClkModInStatus | -1 | CLK | 0xfffd | NONE | SMPL | Boolean | Status input from System.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkModOutStatus | -1 | CLK | 0xfffc | NONE | SMPL | Boolean | Status of Clk Control module as transmitted to system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkModuleId | -1 | CLK | 0xfffe | NONE | SMPL | Ident | Module identification code as an integer^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkPortConfigReg | -1 | CCD# | 0x3000 | SMPL | SMPL | Integer | Sets Ops mode of CLK ports for AFE1 and AFE2; 0=CLK Ports independent; 1=AFE2 copy of AFE1; 2=AFE1 copy of AFE2, 3=Invert clock word.^MOD^ ^1.0^0.0^0.0^2.0
|
| ClkResetCmd | -1 | CLK | 0xfffe | SMPL | NONE | ResetCmnd | Triggers a CLK module reset^MOD^ ^1.0^0.0^0.0^0.0
|
| coAdds | 391 | SFTW | 0x0000 | SMPL | SMPL | count | Number of coadded frames to deliver^MOD^ ^1.0^0.0^0^0xFFFF
|
| colBin | 397 | SFTW | 0x0000 | SMPL | SMPL | Pixels | Number of detector column post scan pixels^MOD^ ^1.0^0.0^0^0xFFFF
|
| ColIncVal | -1 | CCD# | 0x1003 | SMPL | SMPL | Integer | Number of pixels per column^MOD^ ^1.0^0.0^0.0^65535.0
|
| DbgSigSlct | -1 | LCB | 0x0042 | SMPL | SMPL | Select | Multiplexor to select which internal signal set is output to the CFGDATA(7;0) port^MOD^ ^1.0^0.0^0.0^15.0
|
| DbgTrigSlct | -1 | LCB | 0x0043 | SMPL | SMPL | Select | Selects the sig group and signal to be sent to the TSM_PRESENT signal connector as a scope trigger^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| DetectI2CBus | -1 | CFG | 0x0012 | SMPL | SMPL | Boolean | write - I2C detection; Read shows devices Bits (4;0)-Bits(AFE1, AFE0, TSM, PSM, LCB).^MOD^ ^1.0^0.0^0.0^31.0
|
| DetectorTemp1 | 64 | PSM | 0x0020 | NONE | SMPL | Kelvin | Detector temperature measured by sensor 1^MOD^ ^16.0^0.0^0.0^500.0
|
| DetectorTemp2 | 68 | PSM | 0x0021 | NONE | SMPL | Kelvin | Detector temperature measured by sensor 2^MOD^ ^16.0^0.0^0.0^500.0
|
| dewarID | 384 | SFTW | 0x0000 | SMPL | SMPL | IdNum | The dewar/instrument Identifier
|
| DheIsSlave | -1 | CFG | 0x0080 | SMPL | SMPL | Boolean | Configure the DHE as a slave device when true^MOD^ ^1.0^0.0^0.0^1.0
|
| digAvgs | 392 | SFTW | 0x0000 | SMPL | SMPL | count | Number of digital averages to do^MOD^ ^1.0^0.0^0^0xFFFF
|
| dwnLdFdir | -1 | SFTW | 0x0000 | STRGS | STRGS | Directory | The directory for the sequencer download files (....ucd)
|
| dwnLdFname | -1 | SFTW | 0x0000 | STRGS | STRGS | Filename | The default sequencer code file (,...ucd)
|
| eepDataReg[] | -1 | CFG | 0x0030 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[0] | -1 | CFG | 0x0030 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[1] | -1 | CFG | 0x0031 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[10] | -1 | CFG | 0x003a | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[11] | -1 | CFG | 0x003b | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[12] | -1 | CFG | 0x003c | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[13] | -1 | CFG | 0x003d | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[14] | -1 | CFG | 0x003e | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[15] | -1 | CFG | 0x003f | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[2] | -1 | CFG | 0x0032 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[3] | -1 | CFG | 0x0033 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[4] | -1 | CFG | 0x0034 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[5] | -1 | CFG | 0x0035 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[6] | -1 | CFG | 0x0036 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[7] | -1 | CFG | 0x0037 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[8] | -1 | CFG | 0x0038 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[9] | -1 | CFG | 0x0039 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[] | -1 | CFG | 0x0030 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[0] | -1 | CFG | 0x0030 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[1] | -1 | CFG | 0x0031 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[10] | -1 | CFG | 0x003a | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[11] | -1 | CFG | 0x003b | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[12] | -1 | CFG | 0x003c | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[13] | -1 | CFG | 0x003d | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[14] | -1 | CFG | 0x003e | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[15] | -1 | CFG | 0x003f | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[2] | -1 | CFG | 0x0032 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[3] | -1 | CFG | 0x0033 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[4] | -1 | CFG | 0x0034 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[5] | -1 | CFG | 0x0035 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[6] | -1 | CFG | 0x0036 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[7] | -1 | CFG | 0x0037 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[8] | -1 | CFG | 0x0038 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[9] | -1 | CFG | 0x0039 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepRdCmdReg | -1 | CFG | 0x0020 | SMPL | SMPL | Boolean | Command register to select and read an eeprom page^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepWrtCmdReg | -1 | CFG | 0x0021 | SMPL | SMPL | Boolean | Command register to select and write an eeprom page^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| EmbedSyncEnable | -1 | PIX | 0x0101 | SMPL | SMPL | Boolean | Embed the FRAME and LINE sync pulses in bits 31, and 30 of the memory data.^MOD^ ^1.0^0.0^0.0^1.0
|
| epa[] | 440 | SFTW | 0x0000 | SMPL | SMPL | Electrons/ADU | The number of electrons per ADU for normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^1000.0
|
| epa[0] | 441 | SFTW | 0x0000 | SMPL | SMPL | Electrons/ADU | The number of electrons per ADU for normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^1000.0
|
| epa[1] | 442 | SFTW | 0x0000 | SMPL | SMPL | Electrons/ADU | The number of electrons per ADU for normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^1000.0
|
| epa[2] | 443 | SFTW | 0x0000 | SMPL | SMPL | Electrons/ADU | The number of electrons per ADU for normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^1000.0
|
| epa[3] | 444 | SFTW | 0x0000 | SMPL | SMPL | Electrons/ADU | The number of electrons per ADU for normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^1000.0
|
| expEndTime | -1 | SFTW | 0x0000 | SMPL | SMPL | TimeStamp | The msd end time of the observation^MOD^ ^1.0^0.0^0.0^4294967295.0
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| expFdir | -1 | SFTW | 0x0000 | STRGS | STRGS | Directory | The directory for the exposure configuration file (...Exp.mod)
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| expFname | -1 | SFTW | 0x0000 | STRGS | STRGS | Filename | The file that describes the exposure parameters.
|
| expID | -1 | SFTW | 0x0000 | SMPL | SMPL | FloatID | A unique identifier used for each exposure based on the MSD.^MOD^ ^1.0^0.0^0.0^4294967295.0
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| expMode | 393 | SFTW | 0x0000 | SMPL | SMPL | Integer | The Mode of the Exposure used to key the Capture and process Modes^MOD^ ^1.0^0.0^0^0xFFFF
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| expStrtTime | -1 | SFTW | 0x0000 | SMPL | SMPL | TimeStamp | The msd startime of the observation^MOD^ ^1.0^0.0^0.0^4294967295.0
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| expVector | 394 | SFTW | 0x0000 | SMPL | SMPL | Integer | The 30 bit value to write down when doing a startExp command^MOD^ ^1.0^0.0^0^0x3FFFFFFF
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| finDataType | 401 | SFTW | 0x0000 | SMPL | SMPL | TypeID | data type of a finished pixel
|
| finPxlSize | 402 | SFTW | 0x0000 | SMPL | SMPL | Bytes | Sets the Size of finished pixel data width in bytes^MOD^ ^1.0^0.0^0^0xFF
|
| FpdpCmdCopyEn | -1 | LCB | 0x0000 | SMPL | SMPL | Boolean | Enable the command / response messages to be copied to the FPDP comms port.^MOD^ ^1.0^0.0^0.0^1.0
|
| FpdpLoopBackMode | -1 | LCB | 0x0020 | SMPL | SMPL | Boolean | Configures the loopback mode of the fpdp interface.^MOD^ ^1.0^0.0^0.0^7.0
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| FpdpPortDisable | -1 | LCB | 0x0010 | SMPL | SMPL | Boolean | Disable the FPDP comms port and power down the port transceiver.^MOD^ ^1.0^0.0^0.0^1.0
|
| FpgaTemp | 72 | PSM | 0x0000 | NONE | SMPL | Deg C | Current core temperature of the Virtex-5 device ^MOD^ ^2.032^555.0^-273.0^230.0
|
| FpgaTempMax | 76 | PSM | 0x0005 | NONE | SMPL | Deg C | Maximum core temperature of the Virtex-5 device ^MOD^ ^2.032^555.0^-273.0^230.0
|
| FpgaTempMin | 80 | PSM | 0x0008 | NONE | SMPL | Deg C | Minimum core temperature of the Virtex-5 device^MOD^ ^2.032^555.0^-273.0^230.0
|
| FpgaVccAux | 92 | PSM | 0x0002 | NONE | SMPL | Volts | Current auxilary voltage of the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| FpgaVccAuxMax | 96 | PSM | 0x0007 | NONE | SMPL | Volts | Maximum auxilary voltage of the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| FpgaVccAuxMin | 100 | PSM | 0x000a | NONE | SMPL | Volts | Minimum auxilary voltage of the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| FpgaVccInt | 104 | PSM | 0x0001 | NONE | SMPL | Volts | Current core voltage of the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| FpgaVccIntMax | 108 | PSM | 0x0006 | NONE | SMPL | Volts | Maximum core voltage of the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| FpgaVccIntMin | 112 | PSM | 0x0009 | NONE | SMPL | Volts | Minimum core voltage of the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| FpgaVRefN | 84 | PSM | 0x0004 | NONE | SMPL | Volts | Telemetry value for the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| FpgaVRefP | 88 | PSM | 0x0003 | NONE | SMPL | Volts | Telemetry value for the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| frmsPerRdOut | 403 | SFTW | 0x0000 | SMPL | SMPL | FrameCount | number of frames produced by a readout cycle with fSamples==1^MOD^ ^1.0^0.0^0^0xFFFF
|
| fSamples | 395 | SFTW | 0x0000 | SMPL | SMPL | count | Number of low noise read frames to average^MOD^ ^1.0^0.0^0^0xFFFF
|
| GIGeCmdCopyEn | -1 | LCB | 0x0003 | SMPL | SMPL | Boolean | Enable the command / response messages to be copied to the GIGe comms port.^MOD^ ^1.0^0.0^0.0^1.0
|
| GIGeDataWidthSlct | -1 | LCB | 0x0030 | SMPL | SMPL | Select | Select the 16-bit video value from the ADC 18-bit result for the GIGe data stream. Use 3 for a dummy pixel value of 4242.^MOD^ ^1.0^0.0^0.0^3.0
|
| GIGePortDisable | -1 | LCB | 0x0013 | SMPL | SMPL | Boolean | Disable the GIGe comms port and power down.^MOD^ ^1.0^0.0^0.0^1.0
|
| HtrCurrent | 116 | PSM | 0x001e | NONE | SMPL | Milliamps | Detector temperature control heater current^MOD^ ^16.0^0.0^0.0^65535.0
|
| HtrPowerEnable | -1 | PSM | 0x0206 | SMPL | SMPL | Boolean | Enable / Disable the Detector heater power supply ^MOD^ ^1.0^0.0^0.0^1.0
|
| HtrServoEnable | -1 | PSM | 0x0109 | SMPL | SMPL | Boolean | Enable / Disable the Detector temperature control servo loop ^MOD^ ^1.0^0.0^0.0^1.0
|
| HtrServoPauseEnable | -1 | PSM | 0x010b | SMPL | SMPL | Boolean | Disable the Detector temperature control servo loop when reading out ^MOD^ ^1.0^0.0^0.0^1.0
|
| HtrServoPwmValue | 120 | PSM | 0x010a | SMPL | SMPL | % | Output demand value for the Detector temperature controller loop ^MOD^ ^1.27^0.0^0.0^100.0
|
| HtrServoTCValue | 124 | PSM | 0x010c | SMPL | SMPL | Value | Servo Time Constant compensation value^MOD^ ^1.0^0.0^0.0^127.0
|
| HtrTemperature | 132 | PSM | 0x010f | SMPL | SMPL | Kelvin | Detector temperature from selected sensor^MOD^ ^16.0^0.0^0.0^500.0
|
| HtrTempSensorSlct | -1 | PSM | 0x010e | SMPL | SMPL | Boolean | Select the sensor for Detector servo control feedback ^MOD^ ^1.0^0.0^0.0^3.0
|
| HtrTempSetPoint | 128 | PSM | 0x0100 | SMPL | SMPL | Kelvin | Set point temperature for Detector temperature control^MOD^ ^16.0^0.0^0.0^500.0
|
| HtrVolts | 136 | PSM | 0x001f | NONE | SMPL | Volts | Detector temperature control heater voltage^MOD^ ^16.0^0.0^0.0^65535.0
|
| idpFdir | -1 | SFTW | 0x0000 | STRGS | STRGS | Directory | The directory for data disposition files
|
| idpFname | -1 | SFTW | 0x0000 | STRGS | STRGS | Filename | The file that describes the data disposition parameters.
|
| imageCols | -1 | SFTW | 0x0000 | SMPL | SMPL | Pixels | Number of columns in the entire focalplane (XSize or width)^MOD^ ^1.0^0.0^0^0x7FFFFFFF
|
| imageCount | -1 | SFTW | 0x0000 | SMPL | SMPL | Count | Total number of images saved to disk during this session^MOD^ ^1.0^0.0^0^0x7FFFFFFF
|
| imageDir | -1 | SFTW | 0x0000 | STRGS | STRGS | Directory | The directory to store image files in.
|
| imageFile | -1 | SFTW | 0x0000 | STRGS | STRGS | Filename | The current image file name with counters and PAN ID preamble
|
| imageRows | -1 | SFTW | 0x0000 | SMPL | SMPL | Rows | Number of rows in the entire image (YSize or height)^MOD^ ^1.0^0.0^0^0x7FFFFFFF
|
| InitDacs | -1 | CCD# | 0xf006 | SMPL | NONE | Boolean | Initialize all DACs to default settings^MOD^ ^1.0^0.0^0.0^1.0
|
| IntegrationTime | -1 | CFG | 0x0000 | SMPL | SMPL | mSec | Sets the integration time of an exposure^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| intTime | -1 | SFTW | 0x0000 | INTT | INTT | Secs | The desired integration time of an exposure. Resolution is 1 millisecond^MOD^ ^1000.0^0.0^0.0^2147483.647
|
| labSystem | 404 | SFTW | 0x0000 | SMPL | SMPL | ConfigID | DHS Config 2 bits; Bit0 = /Use_MSD; Bit 1 - /Do_Telemetry_Rd^MOD^ ^1.0^0.0^0^0x7
|
| LcbCodeId | -1 | LCB | 0xffff | NONE | SMPL | Version | Firmware module revision code as MM.mm^MOD^ ^100.0^0.0^0.0^65535.0
|
| LcbModInStatus | -1 | LCB | 0xfffd | NONE | SMPL | Boolean | Status of System as received from system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| LcbModOutStatus | -1 | LCB | 0xfffc | NONE | SMPL | Boolean | Status of LCB Control module as transmitted to system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| LcbModuleId | -1 | LCB | 0xfffe | NONE | SMPL | Ident | Firmware module identification code as an integer^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| LcbResetCmd | -1 | LCB | 0xfffe | SMPL | NONE | ResetCmnd | Triggers an LCB module reset^MOD^ ^1.0^0.0^0.0^0.0
|
| LcbSerialNum | -1 | CFG | 0x0050 | NONE | SMPL | SerNum | LCB Silicon Serial Number^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| LcbTemperature1 | 48 | CFG | 0x0040 | NONE | SMPL | Deg C | LCB Temperature reading from sensor 1^MOD^ ^16.0^0.0^-127.0^127.0
|
| LcbTemperature2 | 52 | CFG | 0x0041 | NONE | SMPL | Deg C | LCB Temperature reading from sensor 2^MOD^ ^16.0^0.0^-127.0^127.0
|
| Led1_Slct | -1 | LCB | 0x0040 | SMPL | SMPL | Select | Multiplexor to select which internal signal LED 1 displays on the Sync_In port^MOD^ ^1.0^0.0^0.0^255.0
|
| Led2_Slct | -1 | LCB | 0x0041 | SMPL | SMPL | Select | Multiplexor to select which internal signal LED 2 displays on the Sync_Out port^MOD^ ^1.0^0.0^0.0^255.0
|
| LoadClkCfg | -1 | CLK | 0x0015 | SMPL | SMPL | | Forces the re-loading of the clock conditioner constants - read shows the lock detect bit state^MOD^ ^1.0^0.0^0.0^1.0
|
| MaxPixelvalue | -1 | PIX | 0x0105 | NONE | SMPL | ADU | Maximum pixel value detected in pixel data stream^MOD^ ^1.0^0.0^0.0^262143.0
|
| mcbControl | -1 | CFG | 0xfffb | NONE | RDMSKWRT | Boolean | Emulation of MNSN Orange master control board command reg.^MOD^ ^1.0^0.0^0.0^65535.0
|
| mcbIntTime | -1 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Set by program - The Desired integration time of exposure. Resolution is 1 millisecond^SUB^IntegrationTime^1000.0^0.0^0.0^4294967.295
|
| mcbSeqEnable | -1 | SFTW | 0x0000 | SMPL | SMPL | EnableBit | Load a 1 to Enables sequencer ucode execution^SUB^SeqEnable^1.0^0.0^0.0^1.0
|
| mcbSeqPatMem | -1 | SFTW | 0x0000 | SMPL | SMPL | Address | Address of the start of the sequencer Pattern Memory^SUB^SeqPatMem^1.0^0.0^0.0^65535.0
|
| mcbSeqPgmMem | -1 | SFTW | 0x0000 | SMPL | SMPL | Address | Address of the start of the sequencer Pattern Memory^SUB^SeqPgmMem^1.0^0.0^0.0^65535.0
|
| MemPowerEnable | -1 | PSM | 0x020c | SMPL | SMPL | Boolean | Enable / Disable the Memory 1.8v power supply ^MOD^ ^1.0^0.0^0.0^1.0
|
| MinPixelvalue | -1 | PIX | 0x0104 | NONE | SMPL | ADU | Minimum pixel value detected in pixel data stream^MOD^ ^1.0^0.0^0.0^262143.0
|
| modeFdir | -1 | SFTW | 0x0000 | STRGS | STRGS | Directory | The directory to use when searching for mode files
|
| modeFname | -1 | SFTW | 0x0000 | STRGS | STRGS | filename | The current mode file that was last loaded
|
| mosaicCols | 405 | SFTW | 0x0000 | SMPL | SMPL | ArrayCnt | Number of arrays in the X or width direction^MOD^ ^1.0^0.0^0^0xffff
|
| mosaicRows | 406 | SFTW | 0x0000 | SMPL | SMPL | ArrayCnt | Number of arrays in the Y or height direction.^MOD^ ^1.0^0.0^0^0xffff
|
| numOutputs | 409 | SFTW | 0x0000 | SMPL | SMPL | count | Number of video outputs per detector^MOD^ ^1.0^0.0^0^0xff
|
| outputCfg | 410 | SFTW | 0x0000 | SMPL | SMPL | ConfigID | Two output CFG (0=AB; 1=CD; 2=AD; 3=BC; 4=AC; 5=BD)^MOD^ ^1.0^0.0^0^16
|
| ovrScanCols | 399 | SFTW | 0x0000 | SMPL | SMPL | Pixels | Number of detector column post scan pixels
|
| ovrScanRows | 400 | SFTW | 0x0000 | SMPL | SMPL | Rows | Number of detector post scan rows
|
| PackPixelMode | -1 | PIX | 0x0103 | SMPL | SMPL | Boolean | Enable packing of two 16-bit pixel values in each 32-bit pixel word sent to the PAN^MOD^ ^1.0^0.0^0.0^1.0
|
| PanPxlCount | -1 | PIX | 0x0107 | NONE | SMPL | Value | Number of pixels sent to the PAN^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| PauseExposure | -1 | CFG | 0x0103 | SMPL | SMPL | Boolean | Pauses the current exposure when true^MOD^ ^1.0^0.0^0.0^1.0
|
| PixCodeId | -1 | PIX | 0xffff | NONE | SMPL | Version | Firmware module revision code as MM.mm^MOD^ ^100.0^0.0^0.0^42949673.0
|
| PixModInStatus | -1 | PIX | 0xfffd | NONE | SMPL | Boolean | Status of System as received from system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| PixModOutStatus | -1 | PIX | 0xfffc | NONE | SMPL | Boolean | Status of PIX Control module as transmitted to system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| PixModuleId | -1 | PIX | 0xfffe | NONE | SMPL | Ident | Firmware module identification code as an integer^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| PixResetCmd | -1 | PIX | 0xfffe | SMPL | NONE | ResetCmnd | Triggers a PIX module reset^MOD^ ^1.0^0.0^0.0^0.0
|
| PixSimBurstLen | -1 | LCB | 0x0104 | SMPL | SMPL | Boolean | selects either 8 or 32 pixel bursts for simulation - set to 1 for 32 pixel bursts .^MOD^ ^1.0^0.0^0.0^1.0
|
| PixSimCols | -1 | LCB | 0x0102 | SMPL | SMPL | Columns | Number of simulated columns in simulated detector.^MOD^ ^1.0^0.0^0.0^4095
|
| PixSimDest | -1 | LCB | 0x0101 | SMPL | SMPL | Dest | Destination device for simulated pixel stream.^MOD^ ^1.0^0.0^0.0^15.0
|
| PixSimEnable | -1 | LCB | 0x0100 | SMPL | SMPL | Boolean | Enable simulated pixel stream from the LCB pixel generator.^MOD^ ^1.0^0.0^0.0^1.0
|
| PixSimRows | -1 | LCB | 0x0103 | SMPL | SMPL | Rows | Number of simulated rows in simulated detector.^MOD^ ^1.0^0.0^0.0^4095
|
| PowerDownDHE | -1 | PSM | 0x0203 | SMPL | SMPL | Boolean | Power down the complete DHE ^MOD^ ^1.0^0.0^0.0^1.0
|
| PowerSyncEnable | -1 | PSM | 0x0200 | SMPL | SMPL | Boolean | Enable / Disable the power supply synchronization function ^MOD^ ^1.0^0.0^0.0^1.0
|
| PowerSyncRate | -1 | PSM | 0x0201 | SMPL | SMPL | Value | Clock count of equivelent pixel rate ^MOD^ ^1.0^0.0^0.0^1024.0
|
| PreflashEnable | -1 | CFG | 0x0062 | SMPL | SMPL | Boolean | Enable the sequencer to control the PreFlash^MOD^ ^1.0^0.0^0.0^1.0
|
| PreflashOnCmd | -1 | CFG | 0x0063 | SMPL | SMPL | Boolean | Override the sequencer and force the preflash signal on^MOD^ ^1.0^0.0^0.0^1.0
|
| PreflashPolarity | -1 | CFG | 0x0069 | NONE | SMPL | Boolean | Preflash hardware drive polarity - 0=low signal to turn on preflash; 1=High signal to turn on preflash^MOD^ ^1.0^0.0^0.0^1.0
|
| preScanCols | 455 | SFTW | 0x0000 | SMPL | SMPL | Pixels | Num detector xPreScan pixels^MOD^ ^1.0^0.0^0^0xffff
|
| processMode | 396 | SFTW | 0x0000 | SMPL | SMPL | integerMode | Software mode and algorithm to use when processing data^MOD^ ^1.0^0.0^0^0xFFFF
|
| PsmCodeId | -1 | PSM | 0xffff | NONE | SMPL | Version | Firmware module revision code as MM.mm ^MOD^ ^100.0^0.0^0^655.35
|
| PSMHdwrVersion | -1 | PSM | 0x020e | SMPL | SMPL | Boolean | Set true for control of Revision 0D (prototype) power supply hardware ^MOD^ ^1.0^0.0^0.0^1.0
|
| PsmModInStatus | -1 | PSM | 0xfffd | NONE | SMPL | Boolean | Status of System as received from system. ^MOD^ ^1.0^0.0^0^4294967295.0
|
| PsmModOutStatus | -1 | PSM | 0xfffc | NONE | SMPL | Boolean | Status of PSM Control module as transmitted to system.^MOD^ ^1.0^0.0^0^255.0
|
| PsmModuleId | -1 | PSM | 0xfffe | NONE | SMPL | Ident | Firmware module identification code as an integer ^MOD^ ^1.0^0.0^0^65535.0
|
| PsmResetCmd | -1 | PSM | 0xfffe | SMPL | NONE | ResetCmnd | Triggers an LCB module reset ^MOD^ ^1.0^0.0^0^1.0
|
| PsmSerialNum | -1 | CFG | 0x0051 | NONE | SMPL | SerNum | PSM Silicon Serial Number^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| PsmTemperature1 | 56 | CFG | 0x0042 | NONE | SMPL | Deg C | PSM Temperature reading from sensor 1^MOD^ ^16.0^0.0^-127.0^127.0
|
| PsmTemperature2 | 60 | CFG | 0x0043 | NONE | SMPL | Deg C | PSM Temperature reading from sensor 2^MOD^ ^16.0^0.0^-127.0^127.0
|
| PwrStatOverride | -1 | PSM | 0x020d | SMPL | SMPL | Boolean | Override for power status allowing AFE operation if power indication is bad ^MOD^ ^1.0^0.0^0.0^1.0
|
| PwrSupplyStatus | -1 | PSM | 0x020f | NONE | SMPL | Boolean | Current status of power supply sub-system ^MOD^ ^1.0^0.0^0.0^65535.0
|
| PwrUpAfeSupplies | -1 | PSM | 0x020b | SMPL | SMPL | Boolean | Power up or down the power to the AFE boards.^MOD^ ^1.0^0.0^0.0^1.0
|
| PwrUpPrimarySupplies | -1 | PSM | 0x020a | SMPL | SMPL | Boolean | Power up or down the primary power supplies (VP/N80; VP/N180; VP/N300) ^MOD^ ^1.0^0.0^0.0^1.0
|
| pxlCols | 407 | SFTW | 0x0000 | SMPL | SMPL | Pixels | Number of columns in one detector (XSize or width)^MOD^ ^1.0^0.0^0^0xffff
|
| pxlRows | 408 | SFTW | 0x0000 | SMPL | SMPL | Rows | Number of rows in one detector (YSize or height)^MOD^ ^1.0^0.0^0^0xffff
|
| pxlsPerImage | -1 | SFTW | 0x0000 | SMPL | SMPL | Pixels | Number of pixels in an image^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| QLColumnBin | -1 | PIX | 0x0023 | SMPL | SMPL | Boolean | Select the Column binning factor for quick look data^MOD^ ^1.0^0.0^0.0^3.0
|
| QLDataDestination | -1 | PIX | 0x0022 | SMPL | SMPL | Boolean | Select the comm channel as the quick look data destination^MOD^ ^1.0^0.0^0.0^15.0
|
| QLDataPrecision | -1 | PIX | 0x0021 | SMPL | SMPL | Boolean | Select the Quick Look data precision^MOD^ ^1.0^0.0^0.0^3.0
|
| QLModeSel | -1 | PIX | 0x0020 | SMPL | SMPL | Boolean | Select the Quick Look readout mode^MOD^ ^1.0^0.0^0.0^1.0
|
| QLRowBin | -1 | PIX | 0x0024 | SMPL | SMPL | Boolean | Select the Row binning factor for quick look data^MOD^ ^1.0^0.0^0.0^3.0
|
| rawPxlSize | 411 | SFTW | 0x0000 | SMPL | SMPL | Bytes | Sets the Size of raw pixel data width in bytes^MOD^ ^1.0^0.0^0^64
|
| rdOutTime[] | 421 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[0] | 422 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[1] | 423 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[2] | 424 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[3] | 425 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[4] | 426 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[5] | 427 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[6] | 428 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[7] | 429 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdRoiEnbl | -1 | SFTW | 0x0000 | RMSKW | RMSKW | Boolean | Sequencer jump bit unassigned^ADD^SeqUserBits^4^0^0^1
|
| ReadBuffrIncValue | -1 | PIX | 0x001a | SMPL | SMPL | Inc | Address increment to apply during block read function^MOD^ ^1.0^0.0^0.0^67108863.0
|
| ReadBuffrLength | -1 | PIX | 0x0019 | SMPL | SMPL | words | Number of words to read during block read function^MOD^ ^1.0^0.0^0.0^67108863.0
|
| ReadBuffrOrigin | -1 | PIX | 0x0018 | SMPL | SMPL | Address | Image Buffer Memory address origin for block read function^MOD^ ^1.0^0.0^0.0^67108863.0
|
| ReadSerialNums | -1 | CFG | 0x0014 | SMPL | NONE | BitField | Write to initiate I2C silicon serial number reads^MOD^ ^65536.0^0.0^1.0^16
|
| ReadTemps | -1 | CFG | 0x0013 | SMPL | NONE | BitField | Write to initiate I2C temperature sensor reads^MOD^ ^1.0^0.0^65536.0^1048577.0
|
| rne[] | 450 | SFTW | 0x0000 | SMPL | SMPL | Noise | The Noise number in electrons at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| rne[0] | 451 | SFTW | 0x0000 | SMPL | SMPL | Noise | The Noise number in electrons at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| rne[1] | 452 | SFTW | 0x0000 | SMPL | SMPL | Noise | The Noise number in electrons at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| rne[2] | 453 | SFTW | 0x0000 | SMPL | SMPL | Noise | The Noise number in electrons at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| rne[3] | 454 | SFTW | 0x0000 | SMPL | SMPL | Noise | The Noise number in electrons at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| rowBin | 398 | SFTW | 0x0000 | SMPL | SMPL | Rows | Number of detector post scan rows^MOD^ ^1.0^0.0^0^0xFFFF
|
| RowIncVal | -1 | CCD# | 0x1002 | SMPL | SMPL | Integer | Number of pixels per row^MOD^ ^1.0^0.0^0.0^65535.0
|
| sat[] | 445 | SFTW | 0x0000 | SMPL | SMPL | Electrons | The number of electrons that saturate the pixels at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| sat[0] | 446 | SFTW | 0x0000 | SMPL | SMPL | Electrons | The number of electrons that saturate the pixels at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| sat[1] | 447 | SFTW | 0x0000 | SMPL | SMPL | Electrons | The number of electrons that saturate the pixels at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| sat[2] | 448 | SFTW | 0x0000 | SMPL | SMPL | Electrons | The number of electrons that saturate the pixels at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| sat[3] | 449 | SFTW | 0x0000 | SMPL | SMPL | Electrons | The number of electrons that saturate the pixels at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| SCDataDestination | -1 | PIX | 0x0026 | SMPL | SMPL | Boolean | Select the comm channel as the Science data destination^MOD^ ^1.0^0.0^0.0^15.0
|
| SCDataPrecision | -1 | PIX | 0x0025 | SMPL | SMPL | Boolean | Select the Science data precision^MOD^ ^1.0^0.0^0.0^3.0
|
| SeqClkDivide | -1 | CFG | 0x0106 | SMPL | SMPL | Boolean | Sets the sequencer clock divider ratio 2; 4; 8 or 16^MOD^ ^1.0^0.0^0.0^3.0
|
| SeqCmds | -1 | CFG | 0x0102 | NONE | SMPL | Boolean | Current state of sequencer command register^MOD^ ^1.0^0.0^0.0^65535.0
|
| seqContRun | -1 | SFTW | 0x0000 | RMSKW | RMSKW | Boolean | Sequencer jump bit for continuous running^ADD^SeqUserBits^1^0^0^1
|
| SeqEFR | -1 | CFG | 0x0108 | NONE | SMPL | Boolean | Reads the sequencer enables register^MOD^ ^1.0^0.0^0.0^255.0
|
| SeqEnable | -1 | CFG | 0x0100 | SMPL | SMPL | Boolean | Enable the primary sequencer to run code^MOD^ ^1.0^0.0^0.0^1.0
|
| SeqLoopReg[] | -1 | CFG | 0x0110 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[0] | -1 | CFG | 0x0110 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[1] | -1 | CFG | 0x0111 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[10] | -1 | CFG | 0x011a | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[11] | -1 | CFG | 0x011b | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[12] | -1 | CFG | 0x011c | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[13] | -1 | CFG | 0x011d | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[14] | -1 | CFG | 0x011e | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[15] | -1 | CFG | 0x011f | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[2] | -1 | CFG | 0x0112 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[3] | -1 | CFG | 0x0113 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[4] | -1 | CFG | 0x0114 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[5] | -1 | CFG | 0x0115 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[6] | -1 | CFG | 0x0116 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[7] | -1 | CFG | 0x0117 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[8] | -1 | CFG | 0x0118 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[9] | -1 | CFG | 0x0119 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqPatMem | -1 | CFG | 0x1000 | SMPL | SMPL | Code | Sequencer pattern memory space start address (Note actual mem size is 4096 locations)
|
| SeqPgmMem | -1 | CFG | 0x4000 | SMPL | SMPL | Code | Sequencer program memory space start address (Note actual mem size is 1024 locations)
|
| SeqStatus | -1 | CFG | 0x0107 | NONE | SMPL | Boolean | Reads the sequencer status word^MOD^ ^1.0^0.0^0.0^4294967296.0
|
| SeqTST | -1 | CFG | 0x0109 | NONE | SMPL | Boolean | Reads the sequencer test condition register^MOD^ ^1.0^0.0^0.0^4294967296.0
|
| seqUserBit3 | -1 | SFTW | 0x0000 | RMSKW | RMSKW | Boolean | Sequencer jump bit unassigned^ADD^SeqUserBits^8^0^0^1
|
| SeqUserBits | -1 | CFG | 0x0105 | SMPL | SMPL | Boolean | Sets the user bits (15;12) in the sequencer command register^MOD^ ^1.0^0.0^0.0^15.0
|
| serBinEnbl | -1 | SFTW | 0x0000 | RMSKW | RMSKW | Boolean | Sequencer jump bit unassigned^ADD^SeqUserBits^2^0^0^1
|
| ShutterCloseTime | -1 | CFG | 0x0066 | NONE | SMPL | mSec | Time that shutter took to close after close shutter cmd^MOD^ ^1.0^0.0^0.0^1023.0
|
| ShutterEnable | -1 | CFG | 0x0060 | SMPL | SMPL | Boolean | Enable the sequencer to control the shutter^MOD^ ^1.0^0.0^0.0^1.0
|
| ShutterForceStatus | -1 | CFG | 0x0064 | SMPL | SMPL | Boolean | Override the status inputs and force status equal to the shutter cmd state^MOD^ ^1.0^0.0^0.0^1.0
|
| ShutterOpenCmd | -1 | CFG | 0x0061 | SMPL | SMPL | Boolean | Override the sequencer and force the shutter to open^MOD^ ^1.0^0.0^0.0^1.0
|
| ShutterOpenTime | -1 | CFG | 0x0065 | NONE | SMPL | mSec | Time that shutter took to open after open shutter cmd^MOD^ ^1.0^0.0^0.0^1023.0
|
| ShutterPolarity | -1 | CFG | 0x0068 | NONE | SMPL | Boolean | Shutter hardware drive polarity - 0=low signal to open shutter; 1=High signal to open shutter^MOD^ ^1.0^0.0^0.0^1.0
|
| shutterState | -1 | SFTW | 0x0000 | SMPL | SMPL | Bit_Field | A set of flags which determine how the shutter will be controlled
|
| ShutterStatus | -1 | CFG | 0x0067 | NONE | SMPL | Boolean | Shutter hdwr status input - 00=forced status; 01=shutter open; 10=shutter closed, 11=shutter error.^MOD^ ^1.0^0.0^0.0^3.0
|
| SimDatType | -1 | CCD# | 0x1000 | SMPL | SMPL | Select | Establishes the synthetic data type.^MOD^ ^1.0^0.0^0.0^3.0
|
| SlaveClkMode | -1 | CLK | 0x0082 | NONE | SMPL | Boolean | If DHE is a slave and is using external clock this signal is true^MOD^ ^1.0^0.0^0.0^1.0
|
| SlaveClkXferEn | -1 | CLK | 0x0081 | SMPL | SMPL | Boolean | Configure the DHE to switch to the SYNC clk when it is available and in configures as a Slave device^MOD^ ^1.0^0.0^0.0^1.0
|
| StreamModeEnable | -1 | PIX | 0x0102 | SMPL | SMPL | Boolean | Enables the direct transmission of pixel data to the PAN while also writing to the image buffer^MOD^ ^1.0^0.0^0.0^1.0
|
| SyncClkSelect | -1 | CLK | 0x0083 | SMPL | SMPL | Select | Selects and enables the source for the master SYNC clock output^MOD^ ^1.0^0.0^0.0^15.0
|
| SyncCmdCopyEn | -1 | LCB | 0x0001 | SMPL | SMPL | Boolean | Enable the command / response messages to be copied to the Sync comms port.^MOD^ ^1.0^0.0^0.0^1.0
|
| SyncDelay | -1 | CFG | 0x0104 | SMPL | SMPL | mSec | Sets the delay before a sync pulse is issued when acting as a master^MOD^ ^1.0^0.0^0.0^255.0
|
| SyncInEqualization | -1 | CLK | 0x0085 | SMPL | SMPL | Value | Selects the degree of de-emphasis applied to the SYNC input signals^MOD^ ^1.0^0.0^0.0^3.0
|
| SyncOutEqualization | -1 | CLK | 0x0084 | SMPL | SMPL | Value | Selects the degree of pre-emphasis applied to the SYNC output signals^MOD^ ^1.0^0.0^0.0^3.0
|
| SyncPortDisable | -1 | LCB | 0x0011 | SMPL | SMPL | Boolean | Disable the SYNC comms port.^MOD^ ^1.0^0.0^0.0^1.0
|
| SysCodeId | -1 | SYS | 0xffff | NONE | SMPL | Version | System level build code as version MM.mm
|
| SysRebootCmd | -1 | SYS | 0xffff | SMPL | NONE | Reboot | Triggers a Firmware Reboot
|
| SysResetCmd | -1 | SYS | 0xfffe | SMPL | NONE | Reset | Triggers a system level reset
|
| TelScanCmd | -1 | CCD# | 0xf003 | SMPL | SMPL | cmd | Forces a telemetry update.^MOD^ ^1.0^0.0^0.0^3.0
|
| TelScanInt | -1 | CCD# | 0xf004 | SMPL | SMPL | msec | Sets the scan interval for the automatic telemetry updates.^MOD^ ^1.0^0.0^0.0^4095.0
|
| TempScanEnable | -1 | CFG | 0x0010 | SMPL | SMPL | Boolean | Enable the board temperature measurement scanning function.^MOD^ ^1.0^0.0^0.0^1.0
|
| TempScanPeriod | -1 | CFG | 0x0011 | SMPL | SMPL | mSec | Time period between temperature scans^MOD^ ^1.0^0.0^0.0^1023.0
|
| tolerance | 456 | SFTW | 0x0000 | SMPL | SMPL | mVolts | tolerance for acceptble voltage settings during operatios^MOD^ ^1.0^0.0^0.0^2.000
|
| totFrames | -1 | SFTW | 0x0000 | SMPL | SMPL | Count | Number of frames produced by each startExp before processing^MOD^ ^1.0^0.0^0^0xFFFF
|
| TsmSerialNum | -1 | CFG | 0x0052 | NONE | SMPL | SerNum | TSM Silicon Serial Number^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| TsmTemperature1 | 64 | CFG | 0x0044 | NONE | SMPL | Deg C | TSM Temperature reading from sensor 1^MOD^ ^16.0^0.0^-127.0^127.0
|
| TsmTemperature2 | 68 | CFG | 0x0045 | NONE | SMPL | Deg C | TSM Temperature reading from sensor 2^MOD^ ^16.0^0.0^-127.0^127.0
|
| UartCmdCopyEn | -1 | LCB | 0x0002 | SMPL | SMPL | Boolean | Enable the command / response messages to be copied to the Sync comms port.^MOD^ ^1.0^0.0^0.0^1.0
|
| UartPortDisable | -1 | LCB | 0x0012 | SMPL | SMPL | Boolean | Disable the UART comms port and power down the transceiver.^MOD^ ^1.0^0.0^0.0^1.0
|
| Vana+Amps | 160 | PSM | 0x000f | NONE | SMPL | Milliamps | Current monitor value for the +8V supply^MOD^ ^104.0^0.0^0.0^65535.0
|
| Vana+ServoEnable | -1 | PSM | 0x0139 | SMPL | SMPL | Boolean | Enable / Disable the VP80 supply control servo loop ^MOD^ ^1.0^0.0^0.0^1.0
|
| Vana+ServoPwmValue | 164 | PSM | 0x013a | SMPL | SMPL | % | Output demand value for the VP80 controller loop ^MOD^ ^1.27^0.0^0.0^100.0
|
| Vana+ServoTCValue | 168 | PSM | 0x013c | SMPL | SMPL | Value | Servo Time Constant compensation value^MOD^ ^1.0^0.0^0.0^127.0
|
| Vana+SetPoint | 172 | PSM | 0x0130 | SMPL | SMPL | Volts | Set point voltage for VP80 supply^MOD^ ^29.2^0.0^5.0^9.5
|
| Vana+Volts | 176 | PSM | 0x000e | NONE | SMPL | Volts | Voltage monitor value for the +8V supply^MOD^ ^29.4^0.0^0.0^34.8
|
| Vana-Amps | 180 | PSM | 0x0011 | NONE | SMPL | Milliamps | Current monitor value for the -8V supply^MOD^ ^104.0^0.0^0.0^65535.0
|
| VanaPowerEnable | -1 | PSM | 0x0208 | SMPL | SMPL | Boolean | Enable / Disable the VP80 and VN80 power supplies ^MOD^ ^1.0^0.0^0.0^1.0
|
| Vana-ServoEnable | -1 | PSM | 0x0129 | SMPL | SMPL | Boolean | Enable / Disable the VN80 supply control servo loop ^MOD^ ^1.0^0.0^0.0^1.0
|
| Vana-ServoPwmValue | 184 | PSM | 0x012a | SMPL | SMPL | % | Output demand value for the VN80 controller loop ^MOD^ ^1.27^0.0^0.0^100.0
|
| Vana-ServoTCValue | 188 | PSM | 0x012c | SMPL | SMPL | Value | Servo Time Constant compensation value^MOD^ ^1.0^0.0^0.0^127.0
|
| Vana-SetPoint | 192 | PSM | 0x0120 | SMPL | SMPL | Volts | Set point voltage for VN80 supply^MOD^ ^29.2^993.0^-9.5^-5.0
|
| Vana-Volts | 196 | PSM | 0x0010 | NONE | SMPL | Volts | Voltage monitor value for the -8V supply^MOD^ ^29.2^993.0^-34.8^0.0
|
| VbbPowerEnable | -1 | PSM | 0x0204 | SMPL | SMPL | Boolean | Enable / Disable the VBB power supplie ^MOD^ ^1.0^0.0^0.0^1.0
|
| VbbServoEnable | -1 | PSM | 0x0169 | SMPL | SMPL | Boolean | Enable / Disable the VBB supply control servo loop ^MOD^ ^1.0^0.0^0.0^1.0
|
| VbbServoPwmValue | 200 | PSM | 0x016a | SMPL | SMPL | % | Output demand value for the VBB controller loop ^MOD^ ^1.27^0.0^0.0^100.0
|
| VbbServoTCValue | 204 | PSM | 0x016c | SMPL | SMPL | Value | Servo Time Constant compensation value^MOD^ ^1.0^0.0^0.0^127.0
|
| VbbSetPoint | 208 | PSM | 0x0160 | SMPL | SMPL | Volts | Set point voltage for VBB supply^MOD^ ^29.4^995.0^0.0^80.0
|
| VbbVolts | 212 | PSM | 0x0022 | NONE | SMPL | Volts | Voltage monitor value for VBB Supply^MOD^ ^4.12^0.0^0.0^65535.0
|
| Vcb+ServoEnable | -1 | PSM | 0x0149 | SMPL | SMPL | Boolean | Enable / Disable the VP180 supply control servo loop ^MOD^ ^1.0^0.0^0.0^1.0
|
| Vcb+ServoPwmValue | 216 | PSM | 0x014a | SMPL | SMPL | % | Output demand value for the VP180 controller loop ^MOD^ ^1.27^0.0^0.0^100.0
|
| Vcb+ServoTCValue | 220 | PSM | 0x014c | SMPL | SMPL | Value | Servo Time Constant compensation value^MOD^ ^1.0^0.0^0.0^127.0
|
| Vcb+SetPoint | 224 | PSM | 0x0140 | SMPL | SMPL | Volts | Set point voltage for VP180 supply^MOD^ ^29.2^0.0^10.0^17.5
|
| Vcb+Volts | 228 | PSM | 0x0012 | NONE | SMPL | Volts | Voltage monitor value for the +18V supply^MOD^ ^29.6^0.0^-34.8^0.0
|
| VcbPowerEnable | -1 | PSM | 0x0209 | SMPL | SMPL | Boolean | Enable / Disable the VP180 and VN180 power supplies ^MOD^ ^1.0^0.0^0.0^1.0
|
| Vcb-ServoEnable | -1 | PSM | 0x0159 | SMPL | SMPL | Boolean | Enable / Disable the VN180 supply control servo loop ^MOD^ ^1.0^0.0^0.0^1.0
|
| Vcb-ServoPwmValue | 232 | PSM | 0x015a | SMPL | SMPL | % | Output demand value for the VN180 controller loop ^MOD^ ^1.27^0.0^0.0^100.0
|
| Vcb-ServoTCValue | 236 | PSM | 0x015c | SMPL | SMPL | Value | Servo Time Constant compensation value^MOD^ ^1.0^0.0^0.0^127.0
|
| Vcb-SetPoint | 240 | PSM | 0x0150 | SMPL | SMPL | Volts | Set point voltage for VN180 supply^MOD^ ^29.2^993.0^-17.5^-10.0
|
| Vcb-Volts | 244 | PSM | 0x0015 | NONE | SMPL | Volts | Voltage monitor value for the -18V supply^MOD^ ^29.4^995.0^-34.8^0.0
|
| VccAmps | 248 | PSM | 0x000d | NONE | SMPL | Milliamps | Current monitor value for the +33V supply^MOD^ ^393.0^0.0^0.0^5000.0
|
| VFanPowerEnable | -1 | PSM | 0x0207 | SMPL | SMPL | Boolean | Enable / Disable the DHE Fan power supply ^MOD^ ^1.0^0.0^0.0^1.0
|
| VFanServoEnable | -1 | PSM | 0x0119 | SMPL | SMPL | Boolean | Enable / Disable the DHE temperature control servo loop ^MOD^ ^1.0^0.0^0.0^1.0
|
| VFanServoPwmValue | 140 | PSM | 0x011a | SMPL | SMPL | % | Output demand value for the DHE temperature controller loop ^MOD^ ^1.27^0.0^0.0^100.0
|
| VFanServoTCValue | 144 | PSM | 0x011c | SMPL | SMPL | Value | Servo Time Constant compensation value^MOD^ ^1.0^0.0^0.0^127.0
|
| VFanTemperature | 156 | PSM | 0x011f | SMPL | SMPL | Deg C | DHE temperature from selected sensor^MOD^ ^16.0^0.0^-127.0^127.0
|
| VFanTempSensorSlct | 148 | PSM | 0x011e | SMPL | SMPL | Boolean | Select the sensor for DHE temperature servo control feedback ^MOD^ ^1.0^0.0^0.0^7.0
|
| VFanTempSetPoint | 152 | PSM | 0x0110 | SMPL | SMPL | Deg C | Set point temperature for DHE temperature control^MOD^ ^16.0^0.0^0.0^127.0
|
| Vhv+Volts | 252 | PSM | 0x0018 | NONE | SMPL | Volts | Voltage monitor value for the +30V supply^MOD^ ^29.4^0.0^0.0^34.8
|
| VhvPolaritySlct | -1 | PSM | 0x0205 | SMPL | SMPL | Boolean | Select High Voltage Polarity Mode; 0=+30v/-5v, 1=+5v/-30v ^MOD^ ^1.0^0.0^0.0^1.0
|
| Vhv-Volts | 256 | PSM | 0x001b | NONE | SMPL | Volts | Voltage monitor value for the -30V supply^MOD^ ^29.3^968.0^-34.8^0.0
|
| WatchDogEnable | -1 | LCB | 0x0021 | SMPL | SMPL | Boolean | Enables the watch dog timer - Required to enable the AFE analog outputs to the detector.^MOD^ ^1.0^0.0^0.0^1.0
|
| WatchDogPeriod | -1 | LCB | 0x0022 | SMPL | SMPL | uSecs | Period between watch dog timer retriggers - Must be less than the HW timeout period which is nominally 50us.^MOD^ ^1.0^0.0^0.0^255.0
|
| WrtBuffrDataValue | -1 | PIX | 0x0013 | SMPL | SMPL | Value | Data value to write to Image Buffer memory during block write function^MOD^ ^1.0^0.0^0.0^2147483647.0
|
| WrtBuffrIncValue | -1 | PIX | 0x0012 | SMPL | SMPL | Inc | Address increment to apply during block write function^MOD^ ^1.0^0.0^0.0^2147483647.0
|
| WrtBuffrLength | -1 | PIX | 0x0011 | SMPL | SMPL | words | Number of words to write in block write function^MOD^ ^1.0^0.0^0.0^2147483647.0
|
| WrtBuffrOrigin | -1 | PIX | 0x0010 | SMPL | SMPL | Address | Image Buffer Memory address origin for block write function^MOD^ ^1.0^0.0^0.0^2147483647.0
|
| xStart[] | 430 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting column of each part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| xStart[0] | 431 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting column of each part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| xStart[1] | 432 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting column of each part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| xStart[2] | 433 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting column of each part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| xStart[3] | 434 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting column of each part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| yStart[] | 435 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting row of each the part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| yStart[0] | 436 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting row of each the part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| yStart[1] | 437 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting row of each the part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| yStart[2] | 438 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting row of each the part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| yStart[3] | 439 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting row of each the part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
|
|
Attribute Registers by Module Association
| Attribute Name
| EEPROM Addr
| Module
| Register Addr
| Write Method
| Read Method
| Units/ Type
| Comment
|
| !CCD# | 0x0010 | CCD# | | | | |
|
| SimDatType | -1 | CCD# | 0x1000 | SMPL | SMPL | Select | Establishes the synthetic data type.^MOD^ ^1.0^0.0^0.0^3.0
|
| ActiveChannels | -1 | CCD# | 0x1001 | NONE | SMPL | Integer | Number of active channels for acquisition^MOD^ ^1.0^0.0^0.0^31.0
|
| RowIncVal | -1 | CCD# | 0x1002 | SMPL | SMPL | Integer | Number of pixels per row^MOD^ ^1.0^0.0^0.0^65535.0
|
| ColIncVal | -1 | CCD# | 0x1003 | SMPL | SMPL | Integer | Number of pixels per column^MOD^ ^1.0^0.0^0.0^65535.0
|
| ChanSrcSlct[] | -1 | CCD# | 0x1010 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[0] | -1 | CCD# | 0x1010 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[1] | -1 | CCD# | 0x1011 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[2] | -1 | CCD# | 0x1012 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[3] | -1 | CCD# | 0x1013 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[4] | -1 | CCD# | 0x1014 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[5] | -1 | CCD# | 0x1015 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[6] | -1 | CCD# | 0x1016 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| ChanSrcSlct[7] | -1 | CCD# | 0x1017 | SMPL | SMPL | Integer | Selects the data source for each logical channel^MOD^ ^1.0^0.0^0.0^15.0
|
| BufBaseAddr[] | -1 | CCD# | 0x1020 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[0] | -1 | CCD# | 0x1020 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[1] | -1 | CCD# | 0x1021 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[2] | -1 | CCD# | 0x1022 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[3] | -1 | CCD# | 0x1023 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[4] | -1 | CCD# | 0x1024 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[5] | -1 | CCD# | 0x1025 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[6] | -1 | CCD# | 0x1026 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| BufBaseAddr[7] | -1 | CCD# | 0x1027 | SMPL | SMPL | Integer | Sets the base address for data in the image buffer^MOD^ ^1.0^0.0^0.0^134217727.0
|
| CdsPortConfigReg | -1 | CCD# | 0x2000 | SMPL | SMPL | Integer | Sets CDS port mode; 0-Ports independent; 1- AFE2 is copy of AFE1; 2 - 1 copy of 1; 3 - not valid.^MOD^ ^1.0^0.0^0.0^2.0
|
| CdsChanSlctReg | -1 | CCD# | 0x2001 | SMPL | SMPL | Integer | Bit mask reg to enable CDS writes to individual channels^MOD^ ^1.0^0.0^0.0^255.0
|
| CdsStateReg | -1 | CCD# | 0x2002 | SMPL | SMPL | Integer | Sets the CDS hardware state^MOD^ ^1.0^0.0^0.0^255.0
|
| CcdSeqTrig | -1 | CCD# | 0x2003 | SMPL | SMPL | Integer | Triggers the cds micro-sequencer^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ccdSeqPatMem | -1 | CCD# | 0x2040 | SMPL | SMPL | Integer | Marks the beginning of 64 locations for sequence state data in the cds micro-sequencer^MOD^ ^1.0^0.0^0.0^65535.0
|
| ClkPortConfigReg | -1 | CCD# | 0x3000 | SMPL | SMPL | Integer | Sets Ops mode of CLK ports for AFE1 and AFE2; 0=CLK Ports independent; 1=AFE2 copy of AFE1; 2=AFE1 copy of AFE2, 3=Invert clock word.^MOD^ ^1.0^0.0^0.0^2.0
|
| AfeClkStateReg | -1 | CCD# | 0x3002 | SMPL | SMPL | Integer | Sets the clock state to the hardware^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| AfeInterfaceEnbl | -1 | CCD# | 0xf000 | SMPL | SMPL | Boolean | Enables electrical interface to AFE boards.^MOD^ ^1.0^0.0^0.0^3.0
|
| TelScanCmd | -1 | CCD# | 0xf003 | SMPL | SMPL | cmd | Forces a telemetry update.^MOD^ ^1.0^0.0^0.0^3.0
|
| TelScanInt | -1 | CCD# | 0xf004 | SMPL | SMPL | msec | Sets the scan interval for the automatic telemetry updates.^MOD^ ^1.0^0.0^0.0^4095.0
|
| BiasEnbl | -1 | CCD# | 0xf005 | SMPL | SMPL | Enables | Enables the separate bias bank outputs (4 per AFE).^MOD^ ^1.0^0.0^0.0^255.0
|
| InitDacs | -1 | CCD# | 0xf006 | SMPL | NONE | Boolean | Initialize all DACs to default settings^MOD^ ^1.0^0.0^0.0^1.0
|
| ClkEnbl | -1 | CCD# | 0xf008 | SMPL | SMPL | Enables | Enables the separate clock bank outputs (4 per AFE)^MOD^ ^1.0^0.0^0.0^255.0
|
| AfeModOutStatus | -1 | CCD# | 0xfffc | NONE | SMPL | Boolean | Status of AFE Control module as transmitted to system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| AfeModInStatus | -1 | CCD# | 0xfffd | NONE | SMPL | Boolean | Status of System as received from system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| AfeModuleId | -1 | CCD# | 0xfffe | NONE | SMPL | Ident | Firmware module identification code as an integer^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| AfeResetCmd | -1 | CCD# | 0xfffe | SMPL | NONE | ResetCmd | Causes module reset^MOD^ ^1.0^0.0^0.0^0.0
|
| AfeCodeId | -1 | CCD# | 0xffff | NONE | SMPL | Version | Firmware module revision code as MM.mm^MOD^ ^100.0^0.0^0.0^65535.0
|
| !CCD1 | 0x0010 | CCD1 | | | | |
|
| Afe1LVBiasVal[] | 416 | CCD1 | 0x4000 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[0] | 420 | CCD1 | 0x4000 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[1] | 424 | CCD1 | 0x4001 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[2] | 428 | CCD1 | 0x4002 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[3] | 432 | CCD1 | 0x4003 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[4] | 436 | CCD1 | 0x4004 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[5] | 440 | CCD1 | 0x4005 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[6] | 444 | CCD1 | 0x4006 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1LVBiasVal[7] | 448 | CCD1 | 0x4007 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 1^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe1HVBiasVal[] | 344 | CCD1 | 0x4008 | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[0] | 348 | CCD1 | 0x4008 | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[1] | 352 | CCD1 | 0x4009 | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[2] | 356 | CCD1 | 0x400a | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[3] | 360 | CCD1 | 0x400b | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[4] | 364 | CCD1 | 0x400c | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[5] | 368 | CCD1 | 0x400d | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[6] | 372 | CCD1 | 0x400e | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1HVBiasVal[7] | 376 | CCD1 | 0x400f | SMPL | SMPL | Volts | High voltage bias registers on AFE 1^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe1VidOffVal[] | 516 | CCD1 | 0x4010 | SMPL | SMPL | Integer | Video offset registers on AFE 1^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe1VidOffVal[0] | 520 | CCD1 | 0x4010 | SMPL | SMPL | Integer | Video offset registers on AFE 1^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe1VidOffVal[1] | 524 | CCD1 | 0x4011 | SMPL | SMPL | Integer | Video offset registers on AFE 1^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe1VidOffVal[2] | 528 | CCD1 | 0x4012 | SMPL | SMPL | Integer | Video offset registers on AFE 1^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe1VidOffVal[3] | 532 | CCD1 | 0x4013 | SMPL | SMPL | Integer | Video offset registers on AFE 1^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe1ClkLoVal[] | 208 | CCD1 | 0x4020 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[0] | 212 | CCD1 | 0x4020 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[1] | 216 | CCD1 | 0x4021 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[2] | 220 | CCD1 | 0x4022 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[3] | 224 | CCD1 | 0x4023 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[4] | 228 | CCD1 | 0x4024 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[5] | 232 | CCD1 | 0x4025 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[6] | 236 | CCD1 | 0x4026 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[7] | 240 | CCD1 | 0x4027 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[8] | 244 | CCD1 | 0x4028 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[9] | 248 | CCD1 | 0x4029 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[10] | 252 | CCD1 | 0x402a | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[11] | 256 | CCD1 | 0x402b | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[12] | 260 | CCD1 | 0x402c | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[13] | 264 | CCD1 | 0x402d | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[14] | 268 | CCD1 | 0x402e | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkLoVal[15] | 272 | CCD1 | 0x402f | SMPL | SMPL | Volts | Clock low voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[] | 140 | CCD1 | 0x4030 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[0] | 144 | CCD1 | 0x4030 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[1] | 148 | CCD1 | 0x4031 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[2] | 152 | CCD1 | 0x4032 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[3] | 156 | CCD1 | 0x4033 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[4] | 160 | CCD1 | 0x4034 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[5] | 164 | CCD1 | 0x4035 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[6] | 168 | CCD1 | 0x4036 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[7] | 172 | CCD1 | 0x4037 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[8] | 176 | CCD1 | 0x4038 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[9] | 180 | CCD1 | 0x4039 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[10] | 184 | CCD1 | 0x403a | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[11] | 188 | CCD1 | 0x403b | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[12] | 192 | CCD1 | 0x403c | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[13] | 196 | CCD1 | 0x403d | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[14] | 200 | CCD1 | 0x403e | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1ClkHiVal[15] | 204 | CCD1 | 0x403f | SMPL | SMPL | Volts | Clock high voltage registers on AFE 1^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe1TpClk1 | -1 | CCD1 | 0x7000 | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP1 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1TpClk2 | -1 | CCD1 | 0x7001 | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP2 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1TpClk3 | -1 | CCD1 | 0x7002 | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP3 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1TpClk4 | -1 | CCD1 | 0x7003 | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP4 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1TpLvbias1 | -1 | CCD1 | 0x7004 | SMPL | SMPL | Integer | Sets the LV biases mapped to LV_BIAS_TP1 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1TpLvbias2 | -1 | CCD1 | 0x7005 | SMPL | SMPL | Integer | Sets the LV biases mapped to LV_BIAS_TP2 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1TpHvbias1 | -1 | CCD1 | 0x7006 | SMPL | SMPL | Integer | Sets the HV biases mapped to HV_BIAS_TP1 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1TpHvbias2 | -1 | CCD1 | 0x7007 | SMPL | SMPL | Integer | Sets the HV biases mapped to HV_BIAS_TP2 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe1LvBiasVoltTel[] | 452 | CCD1 | 0x8000 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[0] | 456 | CCD1 | 0x8000 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[1] | 460 | CCD1 | 0x8001 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[2] | 464 | CCD1 | 0x8002 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[3] | 468 | CCD1 | 0x8003 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[4] | 472 | CCD1 | 0x8004 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[5] | 476 | CCD1 | 0x8005 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[6] | 480 | CCD1 | 0x8006 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1LvBiasVoltTel[7] | 484 | CCD1 | 0x8007 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 1^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe1HvBiasVoltTel[] | 380 | CCD1 | 0x8008 | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[0] | 384 | CCD1 | 0x8008 | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[1] | 388 | CCD1 | 0x8009 | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[2] | 392 | CCD1 | 0x800a | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[3] | 396 | CCD1 | 0x800b | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[4] | 400 | CCD1 | 0x800c | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[5] | 404 | CCD1 | 0x800d | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[6] | 408 | CCD1 | 0x800e | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1HvBiasVoltTel[7] | 412 | CCD1 | 0x800f | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 1^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe1ClkVoltTel[] | 276 | CCD1 | 0x8010 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[0] | 280 | CCD1 | 0x8010 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[1] | 284 | CCD1 | 0x8011 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[2] | 288 | CCD1 | 0x8012 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[3] | 292 | CCD1 | 0x8013 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[4] | 296 | CCD1 | 0x8014 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[5] | 300 | CCD1 | 0x8015 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[6] | 304 | CCD1 | 0x8016 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[7] | 308 | CCD1 | 0x8017 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[8] | 312 | CCD1 | 0x8018 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[9] | 316 | CCD1 | 0x8019 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[10] | 320 | CCD1 | 0x801a | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[11] | 324 | CCD1 | 0x801b | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[12] | 328 | CCD1 | 0x801c | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[13] | 332 | CCD1 | 0x801d | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[14] | 336 | CCD1 | 0x801e | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1ClkVoltTel[15] | 340 | CCD1 | 0x801f | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 1^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe1RefVoltTel[] | 488 | CCD1 | 0x8020 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1RefVoltTel[0] | 492 | CCD1 | 0x8020 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1RefVoltTel[1] | 496 | CCD1 | 0x8021 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1RefVoltTel[2] | 500 | CCD1 | 0x8022 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1RefVoltTel[3] | 504 | CCD1 | 0x8023 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1RefVoltTel[4] | 508 | CCD1 | 0x8024 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1RefVoltTel[5] | 512 | CCD1 | 0x8025 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1Vp33VoltTel | 540 | CCD1 | 0x8026 | NONE | SMPL | Volts | Telemetry for Vp3.3 voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1Vp50VoltTel | 544 | CCD1 | 0x8027 | NONE | SMPL | Volts | Telemetry for Vp5.0 voltage on AFE 1^MOD^ ^409.6^0.0^0.0^10.0
|
| Afe1Vp55VoltTel | 548 | CCD1 | 0x8028 | NONE | SMPL | Volts | Telemetry for Vp5.5 voltage on AFE 1^MOD^ ^409.6^0.0^0.0^10.0
|
| Afe1VpIfcVoltTel | 552 | CCD1 | 0x8029 | NONE | SMPL | Volts | Telemetry for VpIfc voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1Vn50VoltTel | 536 | CCD1 | 0x802a | NONE | SMPL | Volts | Telemetry for Vn50 voltage on AFE 1^MOD^ ^409.6^2048.0^-5.0^5.0
|
| Afe1AdcRefVoltTel[] | 52 | CCD1 | 0x802c | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcRefVoltTel[0] | 56 | CCD1 | 0x802c | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcRefVoltTel[1] | 60 | CCD1 | 0x802d | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcRefVoltTel[2] | 64 | CCD1 | 0x802e | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcRefVoltTel[3] | 68 | CCD1 | 0x802f | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcPsVoltTel[] | 32 | CCD1 | 0x8030 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcPsVoltTel[0] | 36 | CCD1 | 0x8030 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcPsVoltTel[1] | 40 | CCD1 | 0x8031 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcPsVoltTel[2] | 44 | CCD1 | 0x8032 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AdcPsVoltTel[3] | 48 | CCD1 | 0x8033 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[] | 72 | CCD1 | 0x8080 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[0] | 76 | CCD1 | 0x8080 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[1] | 80 | CCD1 | 0x8081 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[2] | 84 | CCD1 | 0x8082 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[3] | 88 | CCD1 | 0x8083 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[4] | 92 | CCD1 | 0x8084 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[5] | 96 | CCD1 | 0x8085 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[6] | 100 | CCD1 | 0x8086 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[7] | 104 | CCD1 | 0x8087 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[8] | 108 | CCD1 | 0x8088 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[9] | 112 | CCD1 | 0x8089 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[10] | 116 | CCD1 | 0x808a | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[11] | 120 | CCD1 | 0x808b | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[12] | 124 | CCD1 | 0x808c | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[13] | 128 | CCD1 | 0x808d | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[14] | 132 | CCD1 | 0x808e | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe1AuxTelReg[15] | 136 | CCD1 | 0x808f | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 1^MOD^ ^819.2^0.0^0.0^5.0
|
| !CCD2 | 0x0010 | CCD2 | | | | |
|
| Afe2LVBiasVal[] | 2464 | CCD2 | 0x4040 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[0] | 2468 | CCD2 | 0x4040 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[1] | 2472 | CCD2 | 0x4041 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[2] | 2476 | CCD2 | 0x4042 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[3] | 2480 | CCD2 | 0x4043 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[4] | 2484 | CCD2 | 0x4044 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[5] | 2488 | CCD2 | 0x4045 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[6] | 2492 | CCD2 | 0x4046 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2LVBiasVal[7] | 2496 | CCD2 | 0x4047 | SMPL | SMPL | Volts | Low voltage bias registers on AFE 2^MOD^ ^113.968^2047.483^-16.9^16.9
|
| Afe2HVBiasVal[] | 2392 | CCD2 | 0x4048 | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[0] | 2396 | CCD2 | 0x4048 | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[1] | 2400 | CCD2 | 0x4049 | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[2] | 2404 | CCD2 | 0x404a | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[3] | 2408 | CCD2 | 0x404b | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[4] | 2412 | CCD2 | 0x404c | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[5] | 2416 | CCD2 | 0x404d | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[6] | 2420 | CCD2 | 0x404e | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2HVBiasVal[7] | 2424 | CCD2 | 0x404f | SMPL | SMPL | Volts | High voltage bias registers on AFE 2^MOD^ ^72.828^2047.788^-28.0^28.0
|
| Afe2VidOffVal[] | 2564 | CCD2 | 0x4050 | SMPL | SMPL | Integer | Video offset registers on AFE 2^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe2VidOffVal[0] | 2568 | CCD2 | 0x4050 | SMPL | SMPL | Integer | Video offset registers on AFE 2^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe2VidOffVal[1] | 2572 | CCD2 | 0x4051 | SMPL | SMPL | Integer | Video offset registers on AFE 2^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe2VidOffVal[2] | 2576 | CCD2 | 0x4052 | SMPL | SMPL | Integer | Video offset registers on AFE 2^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe2VidOffVal[3] | 2580 | CCD2 | 0x4053 | SMPL | SMPL | Integer | Video offset registers on AFE 2^MOD^ ^1.0^0.0^0.0^4095.0
|
| Afe2ClkLoVal[] | 2256 | CCD2 | 0x4060 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[0] | 2260 | CCD2 | 0x4060 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[1] | 2264 | CCD2 | 0x4061 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[2] | 2268 | CCD2 | 0x4062 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[3] | 2272 | CCD2 | 0x4063 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[4] | 2276 | CCD2 | 0x4064 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[5] | 2280 | CCD2 | 0x4065 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[6] | 2284 | CCD2 | 0x4066 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[7] | 2288 | CCD2 | 0x4067 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[8] | 2292 | CCD2 | 0x4068 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[9] | 2296 | CCD2 | 0x4069 | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[10] | 2300 | CCD2 | 0x406a | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[11] | 2304 | CCD2 | 0x406b | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[12] | 2308 | CCD2 | 0x406c | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[13] | 2312 | CCD2 | 0x406d | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[14] | 2316 | CCD2 | 0x406e | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkLoVal[15] | 2320 | CCD2 | 0x406f | SMPL | SMPL | Volts | Clock low voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[] | 2188 | CCD2 | 0x4070 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[0] | 2192 | CCD2 | 0x4070 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[1] | 2196 | CCD2 | 0x4071 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[2] | 2200 | CCD2 | 0x4072 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[3] | 2204 | CCD2 | 0x4073 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[4] | 2208 | CCD2 | 0x4074 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[5] | 2212 | CCD2 | 0x4075 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[6] | 2216 | CCD2 | 0x4076 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[7] | 2220 | CCD2 | 0x4077 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[8] | 2224 | CCD2 | 0x4078 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[9] | 2228 | CCD2 | 0x4079 | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[10] | 2232 | CCD2 | 0x407a | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[11] | 2236 | CCD2 | 0x407b | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[12] | 2240 | CCD2 | 0x407c | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[13] | 2244 | CCD2 | 0x407d | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[14] | 2248 | CCD2 | 0x407e | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2ClkHiVal[15] | 2252 | CCD2 | 0x407f | SMPL | SMPL | Volts | Clock high voltage registers on AFE 2^MOD^ ^114.65^2048.0^-16.9^16.9
|
| Afe2TpClk1 | -1 | CCD2 | 0x7008 | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP1 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2TpClk2 | -1 | CCD2 | 0x7009 | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP2 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2TpClk3 | -1 | CCD2 | 0x700a | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP3 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2TpClk4 | -1 | CCD2 | 0x700b | SMPL | SMPL | Integer | Sets the clocks mapped to CLOCK_TP4 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2TpLvbias1 | -1 | CCD2 | 0x700c | SMPL | SMPL | Integer | Sets the LV biases mapped to LV_BIAS_TP1 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2TpLvbias2 | -1 | CCD2 | 0x700d | SMPL | SMPL | Integer | Sets the LV biases mapped to LV_BIAS_TP2 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2TpHvbias1 | -1 | CCD2 | 0x700e | SMPL | SMPL | Integer | Sets the HV biases mapped to HV_BIAS_TP1 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2TpHvbias2 | -1 | CCD2 | 0x700f | SMPL | SMPL | Integer | Sets the HV biases mapped to HV_BIAS_TP2 test points on AFE 1^MOD^ ^1.0^0.0^0.0^3.0
|
| Afe2LvBiasVoltTel[] | 2500 | CCD2 | 0x8040 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[0] | 2504 | CCD2 | 0x8040 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[1] | 2508 | CCD2 | 0x8041 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[2] | 2512 | CCD2 | 0x8042 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[3] | 2516 | CCD2 | 0x8043 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[4] | 2520 | CCD2 | 0x8044 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[5] | 2524 | CCD2 | 0x8045 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[6] | 2528 | CCD2 | 0x8046 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2LvBiasVoltTel[7] | 2532 | CCD2 | 0x8047 | NONE | SMPL | Volts | Telemetry for Low Voltage biases on AFE 2^MOD^ ^100.215^1792.632^-18.0^18.0
|
| Afe2HvBiasVoltTel[] | 2428 | CCD2 | 0x8048 | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[0] | 2432 | CCD2 | 0x8048 | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[1] | 2436 | CCD2 | 0x8049 | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[2] | 2440 | CCD2 | 0x804a | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[3] | 2444 | CCD2 | 0x804b | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[4] | 2448 | CCD2 | 0x804c | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[5] | 2452 | CCD2 | 0x804d | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[6] | 2456 | CCD2 | 0x804e | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2HvBiasVoltTel[7] | 2460 | CCD2 | 0x804f | NONE | SMPL | Volts | Telemetry for High Voltage biases on AFE 2^MOD^ ^66.803^1880.458^-28.0^33.0
|
| Afe2ClkVoltTel[] | 2324 | CCD2 | 0x8050 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[0] | 2328 | CCD2 | 0x8050 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[1] | 2332 | CCD2 | 0x8051 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[2] | 2336 | CCD2 | 0x8052 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[3] | 2340 | CCD2 | 0x8053 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[4] | 2344 | CCD2 | 0x8054 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[5] | 2348 | CCD2 | 0x8055 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[6] | 2352 | CCD2 | 0x8056 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[7] | 2356 | CCD2 | 0x8057 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[8] | 2360 | CCD2 | 0x8058 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[9] | 2364 | CCD2 | 0x8059 | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[10] | 2368 | CCD2 | 0x805a | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[11] | 2372 | CCD2 | 0x805b | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[12] | 2376 | CCD2 | 0x805c | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[13] | 2380 | CCD2 | 0x805d | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[14] | 2384 | CCD2 | 0x805e | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2ClkVoltTel[15] | 2388 | CCD2 | 0x805f | NONE | SMPL | Volts | Telemetry for clock voltages on AFE 2^MOD^ ^100.97^1800.0^-18.0^18.0
|
| Afe2RefVoltTel[] | 2536 | CCD2 | 0x8060 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2RefVoltTel[0] | 2540 | CCD2 | 0x8060 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2RefVoltTel[1] | 2544 | CCD2 | 0x8061 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2RefVoltTel[2] | 2548 | CCD2 | 0x8062 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2RefVoltTel[3] | 2552 | CCD2 | 0x8063 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2RefVoltTel[4] | 2556 | CCD2 | 0x8064 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2RefVoltTel[5] | 2560 | CCD2 | 0x8065 | NONE | SMPL | Volts | Telemetry for reference voltages on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2Vp33VoltTel | 2588 | CCD2 | 0x8066 | NONE | SMPL | Volts | Telemetry for Vp3.3 voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2Vp50VoltTel | 2592 | CCD2 | 0x8067 | NONE | SMPL | Volts | Telemetry for Vp5.0 voltage on AFE 2^MOD^ ^409.6^0.0^0.0^10.0
|
| Afe2Vp55VoltTel | 2596 | CCD2 | 0x8068 | NONE | SMPL | Volts | Telemetry for Vp5.5 voltage on AFE 2^MOD^ ^409.6^0.0^0.0^10.0
|
| Afe2VpIfcVoltTel | 2600 | CCD2 | 0x8069 | NONE | SMPL | Volts | Telemetry for VpIfc voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2Vn50VoltTel | 2584 | CCD2 | 0x806a | NONE | SMPL | Volts | Telemetry for Vn50 voltage on AFE 2^MOD^ ^409.6^2048.0^-5.0^5.0
|
| Afe2AdcRefVoltTel[] | 2100 | CCD2 | 0x806c | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcRefVoltTel[0] | 2104 | CCD2 | 0x806c | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcRefVoltTel[1] | 2108 | CCD2 | 0x806d | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcRefVoltTel[2] | 2112 | CCD2 | 0x806e | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcRefVoltTel[3] | 2116 | CCD2 | 0x806f | NONE | SMPL | Volts | Telemetry for ADC Reference voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcPsVoltTel[] | 2080 | CCD2 | 0x8070 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcPsVoltTel[0] | 2084 | CCD2 | 0x8070 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcPsVoltTel[1] | 2088 | CCD2 | 0x8071 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcPsVoltTel[2] | 2092 | CCD2 | 0x8072 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AdcPsVoltTel[3] | 2096 | CCD2 | 0x8073 | NONE | SMPL | Volts | Telemetry for ADC power supply voltage on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[] | 2120 | CCD2 | 0x8090 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[0] | 2124 | CCD2 | 0x8090 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[1] | 2128 | CCD2 | 0x8091 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[2] | 2132 | CCD2 | 0x8092 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[3] | 2136 | CCD2 | 0x8093 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[4] | 2140 | CCD2 | 0x8094 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[5] | 2144 | CCD2 | 0x8095 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[6] | 2148 | CCD2 | 0x8096 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[7] | 2152 | CCD2 | 0x8097 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[8] | 2156 | CCD2 | 0x8098 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[9] | 2160 | CCD2 | 0x8099 | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[10] | 2164 | CCD2 | 0x809a | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[11] | 2168 | CCD2 | 0x809b | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[12] | 2172 | CCD2 | 0x809c | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[13] | 2176 | CCD2 | 0x809d | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[14] | 2180 | CCD2 | 0x809e | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| Afe2AuxTelReg[15] | 2184 | CCD2 | 0x809f | NONE | SMPL | Volts | Auxiliary telemetry channels on AFE 2^MOD^ ^819.2^0.0^0.0^5.0
|
| !CFG | 0x0004 | CFG | | | | |
|
| IntegrationTime | -1 | CFG | 0x0000 | SMPL | SMPL | mSec | Sets the integration time of an exposure^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| TempScanEnable | -1 | CFG | 0x0010 | SMPL | SMPL | Boolean | Enable the board temperature measurement scanning function.^MOD^ ^1.0^0.0^0.0^1.0
|
| TempScanPeriod | -1 | CFG | 0x0011 | SMPL | SMPL | mSec | Time period between temperature scans^MOD^ ^1.0^0.0^0.0^1023.0
|
| DetectI2CBus | -1 | CFG | 0x0012 | SMPL | SMPL | Boolean | write - I2C detection; Read shows devices Bits (4;0)-Bits(AFE1, AFE0, TSM, PSM, LCB).^MOD^ ^1.0^0.0^0.0^31.0
|
| ReadTemps | -1 | CFG | 0x0013 | SMPL | NONE | BitField | Write to initiate I2C temperature sensor reads^MOD^ ^1.0^0.0^65536.0^1048577.0
|
| ReadSerialNums | -1 | CFG | 0x0014 | SMPL | NONE | BitField | Write to initiate I2C silicon serial number reads^MOD^ ^65536.0^0.0^1.0^16
|
| eepRdCmdReg | -1 | CFG | 0x0020 | SMPL | SMPL | Boolean | Command register to select and read an eeprom page^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepWrtCmdReg | -1 | CFG | 0x0021 | SMPL | SMPL | Boolean | Command register to select and write an eeprom page^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[] | -1 | CFG | 0x0030 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepDataReg[0] | -1 | CFG | 0x0030 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[] | -1 | CFG | 0x0030 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepFloatReg[0] | -1 | CFG | 0x0030 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepDataReg[1] | -1 | CFG | 0x0031 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[1] | -1 | CFG | 0x0031 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepDataReg[2] | -1 | CFG | 0x0032 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[2] | -1 | CFG | 0x0032 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepDataReg[3] | -1 | CFG | 0x0033 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[3] | -1 | CFG | 0x0033 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepDataReg[4] | -1 | CFG | 0x0034 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[4] | -1 | CFG | 0x0034 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepDataReg[5] | -1 | CFG | 0x0035 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[5] | -1 | CFG | 0x0035 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepDataReg[6] | -1 | CFG | 0x0036 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[6] | -1 | CFG | 0x0036 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepDataReg[7] | -1 | CFG | 0x0037 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[7] | -1 | CFG | 0x0037 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepDataReg[8] | -1 | CFG | 0x0038 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[8] | -1 | CFG | 0x0038 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepDataReg[9] | -1 | CFG | 0x0039 | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[9] | -1 | CFG | 0x0039 | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepDataReg[10] | -1 | CFG | 0x003a | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[10] | -1 | CFG | 0x003a | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepDataReg[11] | -1 | CFG | 0x003b | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[11] | -1 | CFG | 0x003b | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepDataReg[12] | -1 | CFG | 0x003c | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[12] | -1 | CFG | 0x003c | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepDataReg[13] | -1 | CFG | 0x003d | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[13] | -1 | CFG | 0x003d | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepDataReg[14] | -1 | CFG | 0x003e | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[14] | -1 | CFG | 0x003e | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| eepDataReg[15] | -1 | CFG | 0x003f | SMPL | SMPL | Binary | EEProm Data registers for read and write operations^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| eepFloatReg[15] | -1 | CFG | 0x003f | SMPL | SMPL | Value | EEProm Data registers for read and write operations^MOD^ ^1000.0^0.0^-2147482.0^2147482.0
|
| LcbTemperature1 | 48 | CFG | 0x0040 | NONE | SMPL | Deg C | LCB Temperature reading from sensor 1^MOD^ ^16.0^0.0^-127.0^127.0
|
| LcbTemperature2 | 52 | CFG | 0x0041 | NONE | SMPL | Deg C | LCB Temperature reading from sensor 2^MOD^ ^16.0^0.0^-127.0^127.0
|
| PsmTemperature1 | 56 | CFG | 0x0042 | NONE | SMPL | Deg C | PSM Temperature reading from sensor 1^MOD^ ^16.0^0.0^-127.0^127.0
|
| PsmTemperature2 | 60 | CFG | 0x0043 | NONE | SMPL | Deg C | PSM Temperature reading from sensor 2^MOD^ ^16.0^0.0^-127.0^127.0
|
| TsmTemperature1 | 64 | CFG | 0x0044 | NONE | SMPL | Deg C | TSM Temperature reading from sensor 1^MOD^ ^16.0^0.0^-127.0^127.0
|
| TsmTemperature2 | 68 | CFG | 0x0045 | NONE | SMPL | Deg C | TSM Temperature reading from sensor 2^MOD^ ^16.0^0.0^-127.0^127.0
|
| Afe1Temperature1 | 32 | CFG | 0x0046 | NONE | SMPL | Deg C | AFE1 Temperature reading from sensor 1^MOD^ ^16.0^0.0^-127.0^127.0
|
| Afe1Temperature2 | 36 | CFG | 0x0047 | NONE | SMPL | Deg C | AFE1 Temperature reading from sensor 2^MOD^ ^16.0^0.0^-127.0^127.0
|
| Afe2Temperature1 | 40 | CFG | 0x0048 | NONE | SMPL | Deg C | AFE2 Temperature reading from sensor 1^MOD^ ^16.0^0.0^-127.0^127.0
|
| Afe2Temperature2 | 44 | CFG | 0x0049 | NONE | SMPL | Deg C | AFE2 Temperature reading from sensor 2^MOD^ ^16.0^0.0^-127.0^127.0
|
| LcbSerialNum | -1 | CFG | 0x0050 | NONE | SMPL | SerNum | LCB Silicon Serial Number^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| PsmSerialNum | -1 | CFG | 0x0051 | NONE | SMPL | SerNum | PSM Silicon Serial Number^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| TsmSerialNum | -1 | CFG | 0x0052 | NONE | SMPL | SerNum | TSM Silicon Serial Number^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| Afe1SerialNum | -1 | CFG | 0x0053 | NONE | SMPL | SerNum | AFE1 Silicon Serial Number^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| Afe2SerialNum | -1 | CFG | 0x0054 | NONE | SMPL | SerNum | AFE2 Silicon Serial Number ^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ShutterEnable | -1 | CFG | 0x0060 | SMPL | SMPL | Boolean | Enable the sequencer to control the shutter^MOD^ ^1.0^0.0^0.0^1.0
|
| ShutterOpenCmd | -1 | CFG | 0x0061 | SMPL | SMPL | Boolean | Override the sequencer and force the shutter to open^MOD^ ^1.0^0.0^0.0^1.0
|
| PreflashEnable | -1 | CFG | 0x0062 | SMPL | SMPL | Boolean | Enable the sequencer to control the PreFlash^MOD^ ^1.0^0.0^0.0^1.0
|
| PreflashOnCmd | -1 | CFG | 0x0063 | SMPL | SMPL | Boolean | Override the sequencer and force the preflash signal on^MOD^ ^1.0^0.0^0.0^1.0
|
| ShutterForceStatus | -1 | CFG | 0x0064 | SMPL | SMPL | Boolean | Override the status inputs and force status equal to the shutter cmd state^MOD^ ^1.0^0.0^0.0^1.0
|
| ShutterOpenTime | -1 | CFG | 0x0065 | NONE | SMPL | mSec | Time that shutter took to open after open shutter cmd^MOD^ ^1.0^0.0^0.0^1023.0
|
| ShutterCloseTime | -1 | CFG | 0x0066 | NONE | SMPL | mSec | Time that shutter took to close after close shutter cmd^MOD^ ^1.0^0.0^0.0^1023.0
|
| ShutterStatus | -1 | CFG | 0x0067 | NONE | SMPL | Boolean | Shutter hdwr status input - 00=forced status; 01=shutter open; 10=shutter closed, 11=shutter error.^MOD^ ^1.0^0.0^0.0^3.0
|
| ShutterPolarity | -1 | CFG | 0x0068 | NONE | SMPL | Boolean | Shutter hardware drive polarity - 0=low signal to open shutter; 1=High signal to open shutter^MOD^ ^1.0^0.0^0.0^1.0
|
| PreflashPolarity | -1 | CFG | 0x0069 | NONE | SMPL | Boolean | Preflash hardware drive polarity - 0=low signal to turn on preflash; 1=High signal to turn on preflash^MOD^ ^1.0^0.0^0.0^1.0
|
| DheIsSlave | -1 | CFG | 0x0080 | SMPL | SMPL | Boolean | Configure the DHE as a slave device when true^MOD^ ^1.0^0.0^0.0^1.0
|
| SeqEnable | -1 | CFG | 0x0100 | SMPL | SMPL | Boolean | Enable the primary sequencer to run code^MOD^ ^1.0^0.0^0.0^1.0
|
| actualIntegrationTime | -1 | CFG | 0x0101 | NONE | SMPL | Sec | Reads the actual integration time of an exposure^MOD^ ^1000.0^0.0^0.0^4294967.0
|
| SeqCmds | -1 | CFG | 0x0102 | NONE | SMPL | Boolean | Current state of sequencer command register^MOD^ ^1.0^0.0^0.0^65535.0
|
| PauseExposure | -1 | CFG | 0x0103 | SMPL | SMPL | Boolean | Pauses the current exposure when true^MOD^ ^1.0^0.0^0.0^1.0
|
| SyncDelay | -1 | CFG | 0x0104 | SMPL | SMPL | mSec | Sets the delay before a sync pulse is issued when acting as a master^MOD^ ^1.0^0.0^0.0^255.0
|
| SeqUserBits | -1 | CFG | 0x0105 | SMPL | SMPL | Boolean | Sets the user bits (15;12) in the sequencer command register^MOD^ ^1.0^0.0^0.0^15.0
|
| SeqClkDivide | -1 | CFG | 0x0106 | SMPL | SMPL | Boolean | Sets the sequencer clock divider ratio 2; 4; 8 or 16^MOD^ ^1.0^0.0^0.0^3.0
|
| SeqStatus | -1 | CFG | 0x0107 | NONE | SMPL | Boolean | Reads the sequencer status word^MOD^ ^1.0^0.0^0.0^4294967296.0
|
| SeqEFR | -1 | CFG | 0x0108 | NONE | SMPL | Boolean | Reads the sequencer enables register^MOD^ ^1.0^0.0^0.0^255.0
|
| SeqTST | -1 | CFG | 0x0109 | NONE | SMPL | Boolean | Reads the sequencer test condition register^MOD^ ^1.0^0.0^0.0^4294967296.0
|
| SeqLoopReg[] | -1 | CFG | 0x0110 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[0] | -1 | CFG | 0x0110 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[1] | -1 | CFG | 0x0111 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[2] | -1 | CFG | 0x0112 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[3] | -1 | CFG | 0x0113 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[4] | -1 | CFG | 0x0114 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[5] | -1 | CFG | 0x0115 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[6] | -1 | CFG | 0x0116 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[7] | -1 | CFG | 0x0117 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[8] | -1 | CFG | 0x0118 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[9] | -1 | CFG | 0x0119 | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[10] | -1 | CFG | 0x011a | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[11] | -1 | CFG | 0x011b | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[12] | -1 | CFG | 0x011c | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[13] | -1 | CFG | 0x011d | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[14] | -1 | CFG | 0x011e | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqLoopReg[15] | -1 | CFG | 0x011f | SMPL | SMPL | Count | Sequencer Loop Data Register for read and write operations^MOD^ ^1.0^0.0^0.0^65535.0
|
| SeqPatMem | -1 | CFG | 0x1000 | SMPL | SMPL | Code | Sequencer pattern memory space start address (Note actual mem size is 4096 locations)
|
| SeqPgmMem | -1 | CFG | 0x4000 | SMPL | SMPL | Code | Sequencer program memory space start address (Note actual mem size is 1024 locations)
|
| mcbControl | -1 | CFG | 0xfffb | NONE | RDMSKWRT | Boolean | Emulation of MNSN Orange master control board command reg.^MOD^ ^1.0^0.0^0.0^65535.0
|
| CfgModOutStatus | -1 | CFG | 0xfffc | NONE | SMPL | Boolean | Status of CFG Control module as transmitted to system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| CfgModInStatus | -1 | CFG | 0xfffd | NONE | SMPL | Boolean | Status of System as received from system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| CfgModuleId | -1 | CFG | 0xfffe | NONE | SMPL | Ident | Firmware module identification code as an integer^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| CfgResetCmd | -1 | CFG | 0xfffe | SMPL | NONE | ResetCmnd | Triggers an CFG module reset^MOD^ ^1.0^0.0^0.0^0.0
|
| CfgCodeId | -1 | CFG | 0xffff | NONE | SMPL | Version | Firmware module revision code as MM.mm^MOD^ ^100.0^0.0^0.0^65535.0
|
| !CLK | 0x0080 | CLK | | | | |
|
| LoadClkCfg | -1 | CLK | 0x0015 | SMPL | SMPL | | Forces the re-loading of the clock conditioner constants - read shows the lock detect bit state^MOD^ ^1.0^0.0^0.0^1.0
|
| ClkCfgRegs[] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[0] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[1] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[2] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[3] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[4] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[5] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[6] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[7] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[8] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[9] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[10] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[11] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[12] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[13] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[14] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkCfgRegs[15] | -1 | CLK | 0x0070 | SMPL | SMPL | Values | Clock conditioner configuration registers.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| SlaveClkXferEn | -1 | CLK | 0x0081 | SMPL | SMPL | Boolean | Configure the DHE to switch to the SYNC clk when it is available and in configures as a Slave device^MOD^ ^1.0^0.0^0.0^1.0
|
| SlaveClkMode | -1 | CLK | 0x0082 | NONE | SMPL | Boolean | If DHE is a slave and is using external clock this signal is true^MOD^ ^1.0^0.0^0.0^1.0
|
| SyncClkSelect | -1 | CLK | 0x0083 | SMPL | SMPL | Select | Selects and enables the source for the master SYNC clock output^MOD^ ^1.0^0.0^0.0^15.0
|
| SyncOutEqualization | -1 | CLK | 0x0084 | SMPL | SMPL | Value | Selects the degree of pre-emphasis applied to the SYNC output signals^MOD^ ^1.0^0.0^0.0^3.0
|
| SyncInEqualization | -1 | CLK | 0x0085 | SMPL | SMPL | Value | Selects the degree of de-emphasis applied to the SYNC input signals^MOD^ ^1.0^0.0^0.0^3.0
|
| ClkModOutStatus | -1 | CLK | 0xfffc | NONE | SMPL | Boolean | Status of Clk Control module as transmitted to system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkModInStatus | -1 | CLK | 0xfffd | NONE | SMPL | Boolean | Status input from System.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkModuleId | -1 | CLK | 0xfffe | NONE | SMPL | Ident | Module identification code as an integer^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClkResetCmd | -1 | CLK | 0xfffe | SMPL | NONE | ResetCmnd | Triggers a CLK module reset^MOD^ ^1.0^0.0^0.0^0.0
|
| ClkCodeId | -1 | CLK | 0xffff | NONE | SMPL | Version | Firmware revision code as MM.mm^MOD^ ^100.0^0.0^0.0^65535.0
|
| !LCB | 0x0001 | LCB | | | | |
|
| FpdpCmdCopyEn | -1 | LCB | 0x0000 | SMPL | SMPL | Boolean | Enable the command / response messages to be copied to the FPDP comms port.^MOD^ ^1.0^0.0^0.0^1.0
|
| SyncCmdCopyEn | -1 | LCB | 0x0001 | SMPL | SMPL | Boolean | Enable the command / response messages to be copied to the Sync comms port.^MOD^ ^1.0^0.0^0.0^1.0
|
| UartCmdCopyEn | -1 | LCB | 0x0002 | SMPL | SMPL | Boolean | Enable the command / response messages to be copied to the Sync comms port.^MOD^ ^1.0^0.0^0.0^1.0
|
| GIGeCmdCopyEn | -1 | LCB | 0x0003 | SMPL | SMPL | Boolean | Enable the command / response messages to be copied to the GIGe comms port.^MOD^ ^1.0^0.0^0.0^1.0
|
| FpdpPortDisable | -1 | LCB | 0x0010 | SMPL | SMPL | Boolean | Disable the FPDP comms port and power down the port transceiver.^MOD^ ^1.0^0.0^0.0^1.0
|
| SyncPortDisable | -1 | LCB | 0x0011 | SMPL | SMPL | Boolean | Disable the SYNC comms port.^MOD^ ^1.0^0.0^0.0^1.0
|
| UartPortDisable | -1 | LCB | 0x0012 | SMPL | SMPL | Boolean | Disable the UART comms port and power down the transceiver.^MOD^ ^1.0^0.0^0.0^1.0
|
| GIGePortDisable | -1 | LCB | 0x0013 | SMPL | SMPL | Boolean | Disable the GIGe comms port and power down.^MOD^ ^1.0^0.0^0.0^1.0
|
| FpdpLoopBackMode | -1 | LCB | 0x0020 | SMPL | SMPL | Boolean | Configures the loopback mode of the fpdp interface.^MOD^ ^1.0^0.0^0.0^7.0
|
| WatchDogEnable | -1 | LCB | 0x0021 | SMPL | SMPL | Boolean | Enables the watch dog timer - Required to enable the AFE analog outputs to the detector.^MOD^ ^1.0^0.0^0.0^1.0
|
| WatchDogPeriod | -1 | LCB | 0x0022 | SMPL | SMPL | uSecs | Period between watch dog timer retriggers - Must be less than the HW timeout period which is nominally 50us.^MOD^ ^1.0^0.0^0.0^255.0
|
| GIGeDataWidthSlct | -1 | LCB | 0x0030 | SMPL | SMPL | Select | Select the 16-bit video value from the ADC 18-bit result for the GIGe data stream. Use 3 for a dummy pixel value of 4242.^MOD^ ^1.0^0.0^0.0^3.0
|
| Led1_Slct | -1 | LCB | 0x0040 | SMPL | SMPL | Select | Multiplexor to select which internal signal LED 1 displays on the Sync_In port^MOD^ ^1.0^0.0^0.0^255.0
|
| Led2_Slct | -1 | LCB | 0x0041 | SMPL | SMPL | Select | Multiplexor to select which internal signal LED 2 displays on the Sync_Out port^MOD^ ^1.0^0.0^0.0^255.0
|
| DbgSigSlct | -1 | LCB | 0x0042 | SMPL | SMPL | Select | Multiplexor to select which internal signal set is output to the CFGDATA(7;0) port^MOD^ ^1.0^0.0^0.0^15.0
|
| DbgTrigSlct | -1 | LCB | 0x0043 | SMPL | SMPL | Select | Selects the sig group and signal to be sent to the TSM_PRESENT signal connector as a scope trigger^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| PixSimEnable | -1 | LCB | 0x0100 | SMPL | SMPL | Boolean | Enable simulated pixel stream from the LCB pixel generator.^MOD^ ^1.0^0.0^0.0^1.0
|
| PixSimDest | -1 | LCB | 0x0101 | SMPL | SMPL | Dest | Destination device for simulated pixel stream.^MOD^ ^1.0^0.0^0.0^15.0
|
| PixSimCols | -1 | LCB | 0x0102 | SMPL | SMPL | Columns | Number of simulated columns in simulated detector.^MOD^ ^1.0^0.0^0.0^4095
|
| PixSimRows | -1 | LCB | 0x0103 | SMPL | SMPL | Rows | Number of simulated rows in simulated detector.^MOD^ ^1.0^0.0^0.0^4095
|
| PixSimBurstLen | -1 | LCB | 0x0104 | SMPL | SMPL | Boolean | selects either 8 or 32 pixel bursts for simulation - set to 1 for 32 pixel bursts .^MOD^ ^1.0^0.0^0.0^1.0
|
| LcbModOutStatus | -1 | LCB | 0xfffc | NONE | SMPL | Boolean | Status of LCB Control module as transmitted to system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| LcbModInStatus | -1 | LCB | 0xfffd | NONE | SMPL | Boolean | Status of System as received from system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| LcbModuleId | -1 | LCB | 0xfffe | NONE | SMPL | Ident | Firmware module identification code as an integer^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| LcbResetCmd | -1 | LCB | 0xfffe | SMPL | NONE | ResetCmnd | Triggers an LCB module reset^MOD^ ^1.0^0.0^0.0^0.0
|
| LcbCodeId | -1 | LCB | 0xffff | NONE | SMPL | Version | Firmware module revision code as MM.mm^MOD^ ^100.0^0.0^0.0^65535.0
|
| !PIX | 0x0008 | PIX | | | | |
|
| WrtBuffrOrigin | -1 | PIX | 0x0010 | SMPL | SMPL | Address | Image Buffer Memory address origin for block write function^MOD^ ^1.0^0.0^0.0^2147483647.0
|
| WrtBuffrLength | -1 | PIX | 0x0011 | SMPL | SMPL | words | Number of words to write in block write function^MOD^ ^1.0^0.0^0.0^2147483647.0
|
| WrtBuffrIncValue | -1 | PIX | 0x0012 | SMPL | SMPL | Inc | Address increment to apply during block write function^MOD^ ^1.0^0.0^0.0^2147483647.0
|
| WrtBuffrDataValue | -1 | PIX | 0x0013 | SMPL | SMPL | Value | Data value to write to Image Buffer memory during block write function^MOD^ ^1.0^0.0^0.0^2147483647.0
|
| BlkWrtToBuffr | -1 | PIX | 0x0014 | SMPL | SMPL | Boolean | Trigger a block write to the Image Buffer memory^MOD^ ^1.0^0.0^0.0^1.0
|
| ReadBuffrOrigin | -1 | PIX | 0x0018 | SMPL | SMPL | Address | Image Buffer Memory address origin for block read function^MOD^ ^1.0^0.0^0.0^67108863.0
|
| ReadBuffrLength | -1 | PIX | 0x0019 | SMPL | SMPL | words | Number of words to read during block read function^MOD^ ^1.0^0.0^0.0^67108863.0
|
| ReadBuffrIncValue | -1 | PIX | 0x001a | SMPL | SMPL | Inc | Address increment to apply during block read function^MOD^ ^1.0^0.0^0.0^67108863.0
|
| BlkReadFromBuffr | -1 | PIX | 0x001b | SMPL | SMPL | Boolean | Trigger a read a block of memory from the Image Buffer^MOD^ ^1.0^0.0^0.0^1.0
|
| QLModeSel | -1 | PIX | 0x0020 | SMPL | SMPL | Boolean | Select the Quick Look readout mode^MOD^ ^1.0^0.0^0.0^1.0
|
| QLDataPrecision | -1 | PIX | 0x0021 | SMPL | SMPL | Boolean | Select the Quick Look data precision^MOD^ ^1.0^0.0^0.0^3.0
|
| QLDataDestination | -1 | PIX | 0x0022 | SMPL | SMPL | Boolean | Select the comm channel as the quick look data destination^MOD^ ^1.0^0.0^0.0^15.0
|
| QLColumnBin | -1 | PIX | 0x0023 | SMPL | SMPL | Boolean | Select the Column binning factor for quick look data^MOD^ ^1.0^0.0^0.0^3.0
|
| QLRowBin | -1 | PIX | 0x0024 | SMPL | SMPL | Boolean | Select the Row binning factor for quick look data^MOD^ ^1.0^0.0^0.0^3.0
|
| SCDataPrecision | -1 | PIX | 0x0025 | SMPL | SMPL | Boolean | Select the Science data precision^MOD^ ^1.0^0.0^0.0^3.0
|
| SCDataDestination | -1 | PIX | 0x0026 | SMPL | SMPL | Boolean | Select the comm channel as the Science data destination^MOD^ ^1.0^0.0^0.0^15.0
|
| EmbedSyncEnable | -1 | PIX | 0x0101 | SMPL | SMPL | Boolean | Embed the FRAME and LINE sync pulses in bits 31, and 30 of the memory data.^MOD^ ^1.0^0.0^0.0^1.0
|
| StreamModeEnable | -1 | PIX | 0x0102 | SMPL | SMPL | Boolean | Enables the direct transmission of pixel data to the PAN while also writing to the image buffer^MOD^ ^1.0^0.0^0.0^1.0
|
| PackPixelMode | -1 | PIX | 0x0103 | SMPL | SMPL | Boolean | Enable packing of two 16-bit pixel values in each 32-bit pixel word sent to the PAN^MOD^ ^1.0^0.0^0.0^1.0
|
| MinPixelvalue | -1 | PIX | 0x0104 | NONE | SMPL | ADU | Minimum pixel value detected in pixel data stream^MOD^ ^1.0^0.0^0.0^262143.0
|
| MaxPixelvalue | -1 | PIX | 0x0105 | NONE | SMPL | ADU | Maximum pixel value detected in pixel data stream^MOD^ ^1.0^0.0^0.0^262143.0
|
| AcqPxlCount | -1 | PIX | 0x0106 | NONE | SMPL | Value | Number of pixels acquired from the detector^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| PanPxlCount | -1 | PIX | 0x0107 | NONE | SMPL | Value | Number of pixels sent to the PAN^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| ClearStats | -1 | PIX | 0x0108 | SMPL | NONE | Value | Clear the pixel statistics counters^MOD^ ^1.0^0.0^0.0^1.0
|
| PixModOutStatus | -1 | PIX | 0xfffc | NONE | SMPL | Boolean | Status of PIX Control module as transmitted to system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| PixModInStatus | -1 | PIX | 0xfffd | NONE | SMPL | Boolean | Status of System as received from system.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| PixModuleId | -1 | PIX | 0xfffe | NONE | SMPL | Ident | Firmware module identification code as an integer^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| PixResetCmd | -1 | PIX | 0xfffe | SMPL | NONE | ResetCmnd | Triggers a PIX module reset^MOD^ ^1.0^0.0^0.0^0.0
|
| PixCodeId | -1 | PIX | 0xffff | NONE | SMPL | Version | Firmware module revision code as MM.mm^MOD^ ^100.0^0.0^0.0^42949673.0
|
| !PSM | 0x0002 | PSM | | | | |
|
| FpgaTemp | 72 | PSM | 0x0000 | NONE | SMPL | Deg C | Current core temperature of the Virtex-5 device ^MOD^ ^2.032^555.0^-273.0^230.0
|
| FpgaVccInt | 104 | PSM | 0x0001 | NONE | SMPL | Volts | Current core voltage of the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| FpgaVccAux | 92 | PSM | 0x0002 | NONE | SMPL | Volts | Current auxilary voltage of the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| FpgaVRefP | 88 | PSM | 0x0003 | NONE | SMPL | Volts | Telemetry value for the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| FpgaVRefN | 84 | PSM | 0x0004 | NONE | SMPL | Volts | Telemetry value for the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| FpgaTempMax | 76 | PSM | 0x0005 | NONE | SMPL | Deg C | Maximum core temperature of the Virtex-5 device ^MOD^ ^2.032^555.0^-273.0^230.0
|
| FpgaVccIntMax | 108 | PSM | 0x0006 | NONE | SMPL | Volts | Maximum core voltage of the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| FpgaVccAuxMax | 96 | PSM | 0x0007 | NONE | SMPL | Volts | Maximum auxilary voltage of the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| FpgaTempMin | 80 | PSM | 0x0008 | NONE | SMPL | Deg C | Minimum core temperature of the Virtex-5 device^MOD^ ^2.032^555.0^-273.0^230.0
|
| FpgaVccIntMin | 112 | PSM | 0x0009 | NONE | SMPL | Volts | Minimum core voltage of the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| FpgaVccAuxMin | 100 | PSM | 0x000a | NONE | SMPL | Volts | Minimum auxilary voltage of the Virtex-5 device ^MOD^ ^341.33^0.0^0.0^3.0
|
| VccAmps | 248 | PSM | 0x000d | NONE | SMPL | Milliamps | Current monitor value for the +33V supply^MOD^ ^393.0^0.0^0.0^5000.0
|
| Vana+Volts | 176 | PSM | 0x000e | NONE | SMPL | Volts | Voltage monitor value for the +8V supply^MOD^ ^29.4^0.0^0.0^34.8
|
| Vana+Amps | 160 | PSM | 0x000f | NONE | SMPL | Milliamps | Current monitor value for the +8V supply^MOD^ ^104.0^0.0^0.0^65535.0
|
| Vana-Volts | 196 | PSM | 0x0010 | NONE | SMPL | Volts | Voltage monitor value for the -8V supply^MOD^ ^29.2^993.0^-34.8^0.0
|
| Vana-Amps | 180 | PSM | 0x0011 | NONE | SMPL | Milliamps | Current monitor value for the -8V supply^MOD^ ^104.0^0.0^0.0^65535.0
|
| Vcb+Volts | 228 | PSM | 0x0012 | NONE | SMPL | Volts | Voltage monitor value for the +18V supply^MOD^ ^29.6^0.0^-34.8^0.0
|
| Afe1Vcb+Amps | 32 | PSM | 0x0013 | NONE | SMPL | Milliamps | Current monitor value for +18V AFE1^MOD^ ^1.96^0.0^0.0^65535.0
|
| Afe2Vcb+Amps | 48 | PSM | 0x0014 | NONE | SMPL | Milliamps | Current monitor value for +18V AFE2^MOD^ ^1.96^0.0^0.0^65535.0
|
| Vcb-Volts | 244 | PSM | 0x0015 | NONE | SMPL | Volts | Voltage monitor value for the -18V supply^MOD^ ^29.4^995.0^-34.8^0.0
|
| Afe1Vcb-Amps | 36 | PSM | 0x0016 | NONE | SMPL | Milliamps | Current monitor value for -18V AFE1^MOD^ ^1.96^0.0^0.0^65535.0
|
| Afe2Vcb-Amps | 52 | PSM | 0x0017 | NONE | SMPL | Milliamps | Current monitor value for -18V AFE2^MOD^ ^1.96^0.0^0.0^65535.0
|
| Vhv+Volts | 252 | PSM | 0x0018 | NONE | SMPL | Volts | Voltage monitor value for the +30V supply^MOD^ ^29.4^0.0^0.0^34.8
|
| Afe1Vhv+Amps | 40 | PSM | 0x0019 | NONE | SMPL | Milliamps | Current monitor value for +30V AFE1^MOD^ ^4.12^0.0^0.0^65535.0
|
| Afe2Vhv+Amps | 56 | PSM | 0x001a | NONE | SMPL | Milliamps | Current monitor value for +30V AFE2^MOD^ ^4.12^0.0^0.0^65535.0
|
| Vhv-Volts | 256 | PSM | 0x001b | NONE | SMPL | Volts | Voltage monitor value for the -30V supply^MOD^ ^29.3^968.0^-34.8^0.0
|
| Afe1Vhv-Amps | 44 | PSM | 0x001c | NONE | SMPL | Milliamps | Current monitor value for -30V AFE1^MOD^ ^4.12^0.0^0.0^65535.0
|
| Afe2Vhv-Amps | 60 | PSM | 0x001d | NONE | SMPL | Milliamps | Current monitor value for -30V AFE2^MOD^ ^4.12^0.0^0.0^65535.0
|
| HtrCurrent | 116 | PSM | 0x001e | NONE | SMPL | Milliamps | Detector temperature control heater current^MOD^ ^16.0^0.0^0.0^65535.0
|
| HtrVolts | 136 | PSM | 0x001f | NONE | SMPL | Volts | Detector temperature control heater voltage^MOD^ ^16.0^0.0^0.0^65535.0
|
| DetectorTemp1 | 64 | PSM | 0x0020 | NONE | SMPL | Kelvin | Detector temperature measured by sensor 1^MOD^ ^16.0^0.0^0.0^500.0
|
| DetectorTemp2 | 68 | PSM | 0x0021 | NONE | SMPL | Kelvin | Detector temperature measured by sensor 2^MOD^ ^16.0^0.0^0.0^500.0
|
| VbbVolts | 212 | PSM | 0x0022 | NONE | SMPL | Volts | Voltage monitor value for VBB Supply^MOD^ ^4.12^0.0^0.0^65535.0
|
| HtrTempSetPoint | 128 | PSM | 0x0100 | SMPL | SMPL | Kelvin | Set point temperature for Detector temperature control^MOD^ ^16.0^0.0^0.0^500.0
|
| HtrServoEnable | -1 | PSM | 0x0109 | SMPL | SMPL | Boolean | Enable / Disable the Detector temperature control servo loop ^MOD^ ^1.0^0.0^0.0^1.0
|
| HtrServoPwmValue | 120 | PSM | 0x010a | SMPL | SMPL | % | Output demand value for the Detector temperature controller loop ^MOD^ ^1.27^0.0^0.0^100.0
|
| HtrServoPauseEnable | -1 | PSM | 0x010b | SMPL | SMPL | Boolean | Disable the Detector temperature control servo loop when reading out ^MOD^ ^1.0^0.0^0.0^1.0
|
| HtrServoTCValue | 124 | PSM | 0x010c | SMPL | SMPL | Value | Servo Time Constant compensation value^MOD^ ^1.0^0.0^0.0^127.0
|
| HtrTempSensorSlct | -1 | PSM | 0x010e | SMPL | SMPL | Boolean | Select the sensor for Detector servo control feedback ^MOD^ ^1.0^0.0^0.0^3.0
|
| HtrTemperature | 132 | PSM | 0x010f | SMPL | SMPL | Kelvin | Detector temperature from selected sensor^MOD^ ^16.0^0.0^0.0^500.0
|
| VFanTempSetPoint | 152 | PSM | 0x0110 | SMPL | SMPL | Deg C | Set point temperature for DHE temperature control^MOD^ ^16.0^0.0^0.0^127.0
|
| VFanServoEnable | -1 | PSM | 0x0119 | SMPL | SMPL | Boolean | Enable / Disable the DHE temperature control servo loop ^MOD^ ^1.0^0.0^0.0^1.0
|
| VFanServoPwmValue | 140 | PSM | 0x011a | SMPL | SMPL | % | Output demand value for the DHE temperature controller loop ^MOD^ ^1.27^0.0^0.0^100.0
|
| VFanServoTCValue | 144 | PSM | 0x011c | SMPL | SMPL | Value | Servo Time Constant compensation value^MOD^ ^1.0^0.0^0.0^127.0
|
| VFanTempSensorSlct | 148 | PSM | 0x011e | SMPL | SMPL | Boolean | Select the sensor for DHE temperature servo control feedback ^MOD^ ^1.0^0.0^0.0^7.0
|
| VFanTemperature | 156 | PSM | 0x011f | SMPL | SMPL | Deg C | DHE temperature from selected sensor^MOD^ ^16.0^0.0^-127.0^127.0
|
| Vana-SetPoint | 192 | PSM | 0x0120 | SMPL | SMPL | Volts | Set point voltage for VN80 supply^MOD^ ^29.2^993.0^-9.5^-5.0
|
| Vana-ServoEnable | -1 | PSM | 0x0129 | SMPL | SMPL | Boolean | Enable / Disable the VN80 supply control servo loop ^MOD^ ^1.0^0.0^0.0^1.0
|
| Vana-ServoPwmValue | 184 | PSM | 0x012a | SMPL | SMPL | % | Output demand value for the VN80 controller loop ^MOD^ ^1.27^0.0^0.0^100.0
|
| Vana-ServoTCValue | 188 | PSM | 0x012c | SMPL | SMPL | Value | Servo Time Constant compensation value^MOD^ ^1.0^0.0^0.0^127.0
|
| Vana+SetPoint | 172 | PSM | 0x0130 | SMPL | SMPL | Volts | Set point voltage for VP80 supply^MOD^ ^29.2^0.0^5.0^9.5
|
| Vana+ServoEnable | -1 | PSM | 0x0139 | SMPL | SMPL | Boolean | Enable / Disable the VP80 supply control servo loop ^MOD^ ^1.0^0.0^0.0^1.0
|
| Vana+ServoPwmValue | 164 | PSM | 0x013a | SMPL | SMPL | % | Output demand value for the VP80 controller loop ^MOD^ ^1.27^0.0^0.0^100.0
|
| Vana+ServoTCValue | 168 | PSM | 0x013c | SMPL | SMPL | Value | Servo Time Constant compensation value^MOD^ ^1.0^0.0^0.0^127.0
|
| Vcb+SetPoint | 224 | PSM | 0x0140 | SMPL | SMPL | Volts | Set point voltage for VP180 supply^MOD^ ^29.2^0.0^10.0^17.5
|
| Vcb+ServoEnable | -1 | PSM | 0x0149 | SMPL | SMPL | Boolean | Enable / Disable the VP180 supply control servo loop ^MOD^ ^1.0^0.0^0.0^1.0
|
| Vcb+ServoPwmValue | 216 | PSM | 0x014a | SMPL | SMPL | % | Output demand value for the VP180 controller loop ^MOD^ ^1.27^0.0^0.0^100.0
|
| Vcb+ServoTCValue | 220 | PSM | 0x014c | SMPL | SMPL | Value | Servo Time Constant compensation value^MOD^ ^1.0^0.0^0.0^127.0
|
| Vcb-SetPoint | 240 | PSM | 0x0150 | SMPL | SMPL | Volts | Set point voltage for VN180 supply^MOD^ ^29.2^993.0^-17.5^-10.0
|
| Vcb-ServoEnable | -1 | PSM | 0x0159 | SMPL | SMPL | Boolean | Enable / Disable the VN180 supply control servo loop ^MOD^ ^1.0^0.0^0.0^1.0
|
| Vcb-ServoPwmValue | 232 | PSM | 0x015a | SMPL | SMPL | % | Output demand value for the VN180 controller loop ^MOD^ ^1.27^0.0^0.0^100.0
|
| Vcb-ServoTCValue | 236 | PSM | 0x015c | SMPL | SMPL | Value | Servo Time Constant compensation value^MOD^ ^1.0^0.0^0.0^127.0
|
| VbbSetPoint | 208 | PSM | 0x0160 | SMPL | SMPL | Volts | Set point voltage for VBB supply^MOD^ ^29.4^995.0^0.0^80.0
|
| VbbServoEnable | -1 | PSM | 0x0169 | SMPL | SMPL | Boolean | Enable / Disable the VBB supply control servo loop ^MOD^ ^1.0^0.0^0.0^1.0
|
| VbbServoPwmValue | 200 | PSM | 0x016a | SMPL | SMPL | % | Output demand value for the VBB controller loop ^MOD^ ^1.27^0.0^0.0^100.0
|
| VbbServoTCValue | 204 | PSM | 0x016c | SMPL | SMPL | Value | Servo Time Constant compensation value^MOD^ ^1.0^0.0^0.0^127.0
|
| PowerSyncEnable | -1 | PSM | 0x0200 | SMPL | SMPL | Boolean | Enable / Disable the power supply synchronization function ^MOD^ ^1.0^0.0^0.0^1.0
|
| PowerSyncRate | -1 | PSM | 0x0201 | SMPL | SMPL | Value | Clock count of equivelent pixel rate ^MOD^ ^1.0^0.0^0.0^1024.0
|
| PowerDownDHE | -1 | PSM | 0x0203 | SMPL | SMPL | Boolean | Power down the complete DHE ^MOD^ ^1.0^0.0^0.0^1.0
|
| VbbPowerEnable | -1 | PSM | 0x0204 | SMPL | SMPL | Boolean | Enable / Disable the VBB power supplie ^MOD^ ^1.0^0.0^0.0^1.0
|
| VhvPolaritySlct | -1 | PSM | 0x0205 | SMPL | SMPL | Boolean | Select High Voltage Polarity Mode; 0=+30v/-5v, 1=+5v/-30v ^MOD^ ^1.0^0.0^0.0^1.0
|
| HtrPowerEnable | -1 | PSM | 0x0206 | SMPL | SMPL | Boolean | Enable / Disable the Detector heater power supply ^MOD^ ^1.0^0.0^0.0^1.0
|
| VFanPowerEnable | -1 | PSM | 0x0207 | SMPL | SMPL | Boolean | Enable / Disable the DHE Fan power supply ^MOD^ ^1.0^0.0^0.0^1.0
|
| VanaPowerEnable | -1 | PSM | 0x0208 | SMPL | SMPL | Boolean | Enable / Disable the VP80 and VN80 power supplies ^MOD^ ^1.0^0.0^0.0^1.0
|
| VcbPowerEnable | -1 | PSM | 0x0209 | SMPL | SMPL | Boolean | Enable / Disable the VP180 and VN180 power supplies ^MOD^ ^1.0^0.0^0.0^1.0
|
| PwrUpPrimarySupplies | -1 | PSM | 0x020a | SMPL | SMPL | Boolean | Power up or down the primary power supplies (VP/N80; VP/N180; VP/N300) ^MOD^ ^1.0^0.0^0.0^1.0
|
| PwrUpAfeSupplies | -1 | PSM | 0x020b | SMPL | SMPL | Boolean | Power up or down the power to the AFE boards.^MOD^ ^1.0^0.0^0.0^1.0
|
| MemPowerEnable | -1 | PSM | 0x020c | SMPL | SMPL | Boolean | Enable / Disable the Memory 1.8v power supply ^MOD^ ^1.0^0.0^0.0^1.0
|
| PwrStatOverride | -1 | PSM | 0x020d | SMPL | SMPL | Boolean | Override for power status allowing AFE operation if power indication is bad ^MOD^ ^1.0^0.0^0.0^1.0
|
| PSMHdwrVersion | -1 | PSM | 0x020e | SMPL | SMPL | Boolean | Set true for control of Revision 0D (prototype) power supply hardware ^MOD^ ^1.0^0.0^0.0^1.0
|
| PwrSupplyStatus | -1 | PSM | 0x020f | NONE | SMPL | Boolean | Current status of power supply sub-system ^MOD^ ^1.0^0.0^0.0^65535.0
|
| PsmModOutStatus | -1 | PSM | 0xfffc | NONE | SMPL | Boolean | Status of PSM Control module as transmitted to system.^MOD^ ^1.0^0.0^0^255.0
|
| PsmModInStatus | -1 | PSM | 0xfffd | NONE | SMPL | Boolean | Status of System as received from system. ^MOD^ ^1.0^0.0^0^4294967295.0
|
| PsmModuleId | -1 | PSM | 0xfffe | NONE | SMPL | Ident | Firmware module identification code as an integer ^MOD^ ^1.0^0.0^0^65535.0
|
| PsmResetCmd | -1 | PSM | 0xfffe | SMPL | NONE | ResetCmnd | Triggers an LCB module reset ^MOD^ ^1.0^0.0^0^1.0
|
| PsmCodeId | -1 | PSM | 0xffff | NONE | SMPL | Version | Firmware module revision code as MM.mm ^MOD^ ^100.0^0.0^0^655.35
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| !SFTW | 0x0000 | SFTW | | | | |
|
| modeFdir | -1 | SFTW | 0x0000 | STRGS | STRGS | Directory | The directory to use when searching for mode files
|
| modeFname | -1 | SFTW | 0x0000 | STRGS | STRGS | filename | The current mode file that was last loaded
|
| expFdir | -1 | SFTW | 0x0000 | STRGS | STRGS | Directory | The directory for the exposure configuration file (...Exp.mod)
|
| expFname | -1 | SFTW | 0x0000 | STRGS | STRGS | Filename | The file that describes the exposure parameters.
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| arrFdir | -1 | SFTW | 0x0000 | STRGS | STRGS | Directory | The directory for the array setup file (...Arr.mod.)
|
| arrFname | -1 | SFTW | 0x0000 | STRGS | STRGS | Filename | The file that describes default array related setup
|
| idpFdir | -1 | SFTW | 0x0000 | STRGS | STRGS | Directory | The directory for data disposition files
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| idpFname | -1 | SFTW | 0x0000 | STRGS | STRGS | Filename | The file that describes the data disposition parameters.
|
| dwnLdFdir | -1 | SFTW | 0x0000 | STRGS | STRGS | Directory | The directory for the sequencer download files (....ucd)
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| dwnLdFname | -1 | SFTW | 0x0000 | STRGS | STRGS | Filename | The default sequencer code file (,...ucd)
|
| imageDir | -1 | SFTW | 0x0000 | STRGS | STRGS | Directory | The directory to store image files in.
|
| imageFile | -1 | SFTW | 0x0000 | STRGS | STRGS | Filename | The current image file name with counters and PAN ID preamble
|
| expID | -1 | SFTW | 0x0000 | SMPL | SMPL | FloatID | A unique identifier used for each exposure based on the MSD.^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| imageCols | -1 | SFTW | 0x0000 | SMPL | SMPL | Pixels | Number of columns in the entire focalplane (XSize or width)^MOD^ ^1.0^0.0^0^0x7FFFFFFF
|
| imageCount | -1 | SFTW | 0x0000 | SMPL | SMPL | Count | Total number of images saved to disk during this session^MOD^ ^1.0^0.0^0^0x7FFFFFFF
|
| imageRows | -1 | SFTW | 0x0000 | SMPL | SMPL | Rows | Number of rows in the entire image (YSize or height)^MOD^ ^1.0^0.0^0^0x7FFFFFFF
|
| intTime | -1 | SFTW | 0x0000 | INTT | INTT | Secs | The desired integration time of an exposure. Resolution is 1 millisecond^MOD^ ^1000.0^0.0^0.0^2147483.647
|
| pxlsPerImage | -1 | SFTW | 0x0000 | SMPL | SMPL | Pixels | Number of pixels in an image^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| shutterState | -1 | SFTW | 0x0000 | SMPL | SMPL | Bit_Field | A set of flags which determine how the shutter will be controlled
|
| totFrames | -1 | SFTW | 0x0000 | SMPL | SMPL | Count | Number of frames produced by each startExp before processing^MOD^ ^1.0^0.0^0^0xFFFF
|
| abort | -1 | SFTW | 0x0000 | RMSKW | RMSKW | Boolean | Control register for various bits^ADD^mcbControl^1^0^0^1
|
| actualIntTime | -1 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Set by DHE - The Actual integration time of exposure. Resolution is 1 millisecond^SUB^actualIntegrationTime^1000.0^0.0^0.0^4294967.295
|
| mcbIntTime | -1 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Set by program - The Desired integration time of exposure. Resolution is 1 millisecond^SUB^IntegrationTime^1000.0^0.0^0.0^4294967.295
|
| mcbSeqEnable | -1 | SFTW | 0x0000 | SMPL | SMPL | EnableBit | Load a 1 to Enables sequencer ucode execution^SUB^SeqEnable^1.0^0.0^0.0^1.0
|
| mcbSeqPatMem | -1 | SFTW | 0x0000 | SMPL | SMPL | Address | Address of the start of the sequencer Pattern Memory^SUB^SeqPatMem^1.0^0.0^0.0^65535.0
|
| mcbSeqPgmMem | -1 | SFTW | 0x0000 | SMPL | SMPL | Address | Address of the start of the sequencer Pattern Memory^SUB^SeqPgmMem^1.0^0.0^0.0^65535.0
|
| seqContRun | -1 | SFTW | 0x0000 | RMSKW | RMSKW | Boolean | Sequencer jump bit for continuous running^ADD^SeqUserBits^1^0^0^1
|
| rdRoiEnbl | -1 | SFTW | 0x0000 | RMSKW | RMSKW | Boolean | Sequencer jump bit unassigned^ADD^SeqUserBits^4^0^0^1
|
| seqUserBit3 | -1 | SFTW | 0x0000 | RMSKW | RMSKW | Boolean | Sequencer jump bit unassigned^ADD^SeqUserBits^8^0^0^1
|
| serBinEnbl | -1 | SFTW | 0x0000 | RMSKW | RMSKW | Boolean | Sequencer jump bit unassigned^ADD^SeqUserBits^2^0^0^1
|
| expEndTime | -1 | SFTW | 0x0000 | SMPL | SMPL | TimeStamp | The msd end time of the observation^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| expStrtTime | -1 | SFTW | 0x0000 | SMPL | SMPL | TimeStamp | The msd startime of the observation^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| dewarID | 384 | SFTW | 0x0000 | SMPL | SMPL | IdNum | The dewar/instrument Identifier
|
| ArrayType | 385 | SFTW | 0x0000 | SMPL | SMPL | IdNum | The Array type identifier index
|
| asyncVector | 386 | SFTW | 0x0000 | SMPL | SMPL | Bit_Field | The 30 bit value to write down for an asyncronous response^MOD^ ^1.0^0.0^0^0x3FFFFFFF
|
| avCommentSize | 387 | SFTW | 0x0000 | SMPL | SMPL | count | The number of characters in the AV pair array Comment column^MOD^ ^1.0^0.0^0^0xFF
|
| avNameSIze | 388 | SFTW | 0x0000 | SMPL | SMPL | count | The number of characters in the AV pair array Name column^MOD^ ^1.0^0.0^0^0xFF
|
| avValueSize | 389 | SFTW | 0x0000 | SMPL | SMPL | count | The number of characters in the AV pair array Value colum^MOD^ ^1.0^0.0^0^0xFF
|
| captureMode | 390 | SFTW | 0x0000 | SMPL | SMPL | Mode | Software mode to use when capturing data^MOD^ ^1.0^0.0^0^0xFFFF
|
| coAdds | 391 | SFTW | 0x0000 | SMPL | SMPL | count | Number of coadded frames to deliver^MOD^ ^1.0^0.0^0^0xFFFF
|
| digAvgs | 392 | SFTW | 0x0000 | SMPL | SMPL | count | Number of digital averages to do^MOD^ ^1.0^0.0^0^0xFFFF
|
| expMode | 393 | SFTW | 0x0000 | SMPL | SMPL | Integer | The Mode of the Exposure used to key the Capture and process Modes^MOD^ ^1.0^0.0^0^0xFFFF
|
| expVector | 394 | SFTW | 0x0000 | SMPL | SMPL | Integer | The 30 bit value to write down when doing a startExp command^MOD^ ^1.0^0.0^0^0x3FFFFFFF
|
| fSamples | 395 | SFTW | 0x0000 | SMPL | SMPL | count | Number of low noise read frames to average^MOD^ ^1.0^0.0^0^0xFFFF
|
| processMode | 396 | SFTW | 0x0000 | SMPL | SMPL | integerMode | Software mode and algorithm to use when processing data^MOD^ ^1.0^0.0^0^0xFFFF
|
| colBin | 397 | SFTW | 0x0000 | SMPL | SMPL | Pixels | Number of detector column post scan pixels^MOD^ ^1.0^0.0^0^0xFFFF
|
| rowBin | 398 | SFTW | 0x0000 | SMPL | SMPL | Rows | Number of detector post scan rows^MOD^ ^1.0^0.0^0^0xFFFF
|
| ovrScanCols | 399 | SFTW | 0x0000 | SMPL | SMPL | Pixels | Number of detector column post scan pixels
|
| ovrScanRows | 400 | SFTW | 0x0000 | SMPL | SMPL | Rows | Number of detector post scan rows
|
| finDataType | 401 | SFTW | 0x0000 | SMPL | SMPL | TypeID | data type of a finished pixel
|
| finPxlSize | 402 | SFTW | 0x0000 | SMPL | SMPL | Bytes | Sets the Size of finished pixel data width in bytes^MOD^ ^1.0^0.0^0^0xFF
|
| frmsPerRdOut | 403 | SFTW | 0x0000 | SMPL | SMPL | FrameCount | number of frames produced by a readout cycle with fSamples==1^MOD^ ^1.0^0.0^0^0xFFFF
|
| labSystem | 404 | SFTW | 0x0000 | SMPL | SMPL | ConfigID | DHS Config 2 bits; Bit0 = /Use_MSD; Bit 1 - /Do_Telemetry_Rd^MOD^ ^1.0^0.0^0^0x7
|
| mosaicCols | 405 | SFTW | 0x0000 | SMPL | SMPL | ArrayCnt | Number of arrays in the X or width direction^MOD^ ^1.0^0.0^0^0xffff
|
| mosaicRows | 406 | SFTW | 0x0000 | SMPL | SMPL | ArrayCnt | Number of arrays in the Y or height direction.^MOD^ ^1.0^0.0^0^0xffff
|
| pxlCols | 407 | SFTW | 0x0000 | SMPL | SMPL | Pixels | Number of columns in one detector (XSize or width)^MOD^ ^1.0^0.0^0^0xffff
|
| pxlRows | 408 | SFTW | 0x0000 | SMPL | SMPL | Rows | Number of rows in one detector (YSize or height)^MOD^ ^1.0^0.0^0^0xffff
|
| numOutputs | 409 | SFTW | 0x0000 | SMPL | SMPL | count | Number of video outputs per detector^MOD^ ^1.0^0.0^0^0xff
|
| outputCfg | 410 | SFTW | 0x0000 | SMPL | SMPL | ConfigID | Two output CFG (0=AB; 1=CD; 2=AD; 3=BC; 4=AC; 5=BD)^MOD^ ^1.0^0.0^0^16
|
| rawPxlSize | 411 | SFTW | 0x0000 | SMPL | SMPL | Bytes | Sets the Size of raw pixel data width in bytes^MOD^ ^1.0^0.0^0^64
|
| arrayID[] | 412 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[0] | 413 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[1] | 414 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[2] | 415 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[3] | 416 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[4] | 417 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[5] | 418 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[6] | 419 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| arrayID[7] | 420 | SFTW | 0x0000 | SMPL | SMPL | SerialNo | Srialnumber for each array by videoChannel^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[] | 421 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[0] | 422 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[1] | 423 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[2] | 424 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[3] | 425 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[4] | 426 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[5] | 427 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[6] | 428 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| rdOutTime[7] | 429 | SFTW | 0x0000 | SMPL | SMPL | mSecs | Time to read the detector once at Normal(0), Low(1) and High(2) gain^MOD^ ^1.0^0.0^0.0^4294967.295
|
| xStart[] | 430 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting column of each part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| xStart[0] | 431 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting column of each part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| xStart[1] | 432 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting column of each part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| xStart[2] | 433 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting column of each part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| xStart[3] | 434 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting column of each part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| yStart[] | 435 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting row of each the part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| yStart[0] | 436 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting row of each the part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| yStart[1] | 437 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting row of each the part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| yStart[2] | 438 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting row of each the part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| yStart[3] | 439 | SFTW | 0x0000 | SMPL | SMPL | Coordinate | The starting row of each the part of the focal plane^MOD^ ^1.0^0.0^0.0^4294967295.0
|
| epa[] | 440 | SFTW | 0x0000 | SMPL | SMPL | Electrons/ADU | The number of electrons per ADU for normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^1000.0
|
| epa[0] | 441 | SFTW | 0x0000 | SMPL | SMPL | Electrons/ADU | The number of electrons per ADU for normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^1000.0
|
| epa[1] | 442 | SFTW | 0x0000 | SMPL | SMPL | Electrons/ADU | The number of electrons per ADU for normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^1000.0
|
| epa[2] | 443 | SFTW | 0x0000 | SMPL | SMPL | Electrons/ADU | The number of electrons per ADU for normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^1000.0
|
| epa[3] | 444 | SFTW | 0x0000 | SMPL | SMPL | Electrons/ADU | The number of electrons per ADU for normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^1000.0
|
| sat[] | 445 | SFTW | 0x0000 | SMPL | SMPL | Electrons | The number of electrons that saturate the pixels at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| sat[0] | 446 | SFTW | 0x0000 | SMPL | SMPL | Electrons | The number of electrons that saturate the pixels at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| sat[1] | 447 | SFTW | 0x0000 | SMPL | SMPL | Electrons | The number of electrons that saturate the pixels at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| sat[2] | 448 | SFTW | 0x0000 | SMPL | SMPL | Electrons | The number of electrons that saturate the pixels at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| sat[3] | 449 | SFTW | 0x0000 | SMPL | SMPL | Electrons | The number of electrons that saturate the pixels at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| rne[] | 450 | SFTW | 0x0000 | SMPL | SMPL | Noise | The Noise number in electrons at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| rne[0] | 451 | SFTW | 0x0000 | SMPL | SMPL | Noise | The Noise number in electrons at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| rne[1] | 452 | SFTW | 0x0000 | SMPL | SMPL | Noise | The Noise number in electrons at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| rne[2] | 453 | SFTW | 0x0000 | SMPL | SMPL | Noise | The Noise number in electrons at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| rne[3] | 454 | SFTW | 0x0000 | SMPL | SMPL | Noise | The Noise number in electrons at normal(0), low(1) and High(2) gain^MOD^ ^1.0^0.0^0^524288.0
|
| preScanCols | 455 | SFTW | 0x0000 | SMPL | SMPL | Pixels | Num detector xPreScan pixels^MOD^ ^1.0^0.0^0^0xffff
|
| tolerance | 456 | SFTW | 0x0000 | SMPL | SMPL | mVolts | tolerance for acceptble voltage settings during operatios^MOD^ ^1.0^0.0^0.0^2.000
|
| !SYS | 0x0000 | SFTW | | | | |
|
| SysResetCmd | -1 | SYS | 0xfffe | SMPL | NONE | Reset | Triggers a system level reset
|
| SysRebootCmd | -1 | SYS | 0xffff | SMPL | NONE | Reboot | Triggers a Firmware Reboot
|
| SysCodeId | -1 | SYS | 0xffff | NONE | SMPL | Version | System level build code as version MM.mm
|
|
|